PIC16F88

Manufacturer Part NumberPIC16F88
ManufacturerMicrochip Technology Inc.
PIC16F88 datasheet
 
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PIC16F87/88
TABLE 2-1:
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address
Name
Bit 7
Bit 6
Bank 2
(2)
100h
INDF
Addressing this location uses contents of FSR to address data memory (not a physical register)
101h
TMR0
Timer0 Module Register
(2)
102h
PCL
Program Counter’s (PC) Least Significant Byte
(2)
103h
STATUS
IRP
RP1
(2)
104h
FSR
Indirect Data Memory Address Pointer
105h
WDTCON
—
—
106h
PORTB
PORTB Data Latch when written; PORTB pins when read (PIC16F87)
PORTB Data Latch when written; PORTB pins when read (PIC16F88)
107h
—
Unimplemented
108h
—
Unimplemented
109h
—
Unimplemented
(1,2)
10Ah
PCLATH
—
—
(2)
10Bh
INTCON
GIE
PEIE
10Ch
EEDATA
EEPROM/Flash Data Register Low Byte
10Dh
EEADR
EEPROM/Flash Address Register Low Byte
10Eh
EEDATH
—
—
10Fh
EEADRH
—
—
Bank 3
(2)
180h
INDF
Addressing this location uses contents of FSR to address data memory (not a physical register)
181h
OPTION_REG
RBPU
INTEDG
(2)
182h
PCL
Program Counter (PC) Least Significant Byte
(2)
183h
STATUS
IRP
RP1
(2)
184h
FSR
Indirect Data Memory Address Pointer
185h
—
Unimplemented
186h
TRISB
PORTB Data Direction Register
187h
—
Unimplemented
188h
—
Unimplemented
189h
—
Unimplemented
(1,2)
18Ah
PCLATH
—
—
(2)
18Bh
INTCON
GIE
PEIE
18Ch
EECON1
EEPGD
—
18Dh
EECON2
EEPROM Control Register 2 (not a physical register)
18Eh
—
Reserved, maintain clear
18Fh
—
Reserved, maintain clear
Legend:
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Note 1:
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for PC<12:8>, whose
contents are transferred to the upper byte of the program counter.
2:
These registers can be addressed from any bank.
3:
RA5 is an input only; the state of the TRISA5 bit has no effect and will always read ‘1’.
4:
PIC16F88 device only.
DS30487C-page 16
Bit 5
Bit 4
Bit 3
Bit 2
RP0
TO
PD
Z
WDTPS3
WDTPS2
WDTPS1
—
—
Write Buffer for the Upper 5 bits of the Program Counter
TMR0IE
INT0IE
RBIE
TMR0IF
EEPROM/Flash Data Register High Byte
—
—
EEPROM/Flash Address Register High Byte
T0CS
T0SE
PSA
PS2
RP0
TO
PD
Z
—
Write Buffer for the Upper 5 bits of the Program Counter
TMR0IE
INT0IE
RBIE
TMR0IF
—
FREE
WRERR
WREN
Details
Value on:
Bit 1
Bit 0
on
POR, BOR
page
26, 135
0000 0000
69
xxxx xxxx
135
0000 0000
17
DC
C
0001 1xxx
135
xxxx xxxx
WDTPS0
SWDTEN
142
---0 1000
58
xxxx xxxx
00xx xxxx
—
—
—
—
—
—
135
---0 0000
19, 69,
INT0IF
RBIF
0000 000x
77
34
xxxx xxxx
34
xxxx xxxx
34
--xx xxxx
34
---- xxxx
135
0000 0000
PS1
PS0
18, 69
1111 1111
135
0000 0000
17
DC
C
0001 1xxx
135
xxxx xxxx
—
—
58, 83
1111 1111
—
—
—
—
—
—
135
---0 0000
19, 69,
INT0IF
RBIF
0000 000x
77
WR
RD
28, 34
x--x x000
34
---- ----
—
0000 0000
—
0000 0000
 2005 Microchip Technology Inc.

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