PIC16F88

Manufacturer Part NumberPIC16F88
ManufacturerMicrochip Technology Inc.
PIC16F88 datasheet
 
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Page 25/228:

PIR2 Register

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2.2.2.7

PIR2 Register

The PIR2 register contains the flag bit for the EEPROM
write operation interrupt.
.
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit, or the global
enable bit, GIE (INTCON<7>). User
software should ensure the appropriate
interrupt flag bits are clear prior to
enabling an interrupt.
REGISTER 2-7:
PIR2: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 2 (ADDRESS 0Dh)
R/W-0
R/W-0
OSFIF
bit 7
bit 7
OSFIF: Oscillator Fail Interrupt Flag bit
1 = System oscillator failed, clock input has changed to INTRC (must be cleared in software)
0 = System clock operating
bit 6
CMIF: Comparator Interrupt Flag bit
1 = Comparator input has changed (must be cleared in software)
0 = Comparator input has not changed
bit 5
Unimplemented: Read as ‘0’
bit 4
EEIF: EEPROM Write Operation Interrupt Flag bit
1 = The write operation completed (must be cleared in software)
0 = The write operation is not complete or has not been started
bit 3-0
Unimplemented: Read as ‘0’
Legend:
R = Readable bit
-n = Value at POR
 2005 Microchip Technology Inc.
U-0
R/W-0
CMIF
EEIF
W = Writable bit
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
‘0’ = Bit is cleared
PIC16F87/88
U-0
U-0
U-0
U-0
bit 0
x = Bit is unknown
DS30487C-page 23