PIC16F88

Manufacturer Part NumberPIC16F88
ManufacturerMicrochip Technology Inc.
PIC16F88 datasheet
 
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Page 27/228:

PCL and PCLATH

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2.3

PCL and PCLATH

The Program Counter (PC) is 13 bits wide. The low
byte comes from the PCL register which is a readable
and writable register. The upper bits (PC<12:8>) are
not readable but are indirectly writable through the
PCLATH register. On any Reset, the upper bits of the
PC will be cleared. Figure 2-4 shows the two situations
for the loading of the PC. The upper example in the
figure shows how the PC is loaded on a write to PCL
(PCLATH<4:0>
PCH). The lower example in the
figure shows how the PC is loaded during a CALL or
GOTO instruction (PCLATH<4:3>
PCH).
FIGURE 2-4:
LOADING OF PC IN
DIFFERENT SITUATIONS
PCH
PCL
12
8
7
0
PC
8
PCLATH<4:0>
5
PCLATH
PCH
PCL
12 11 10
8
7
0
PC
PCLATH<4:3>
11
2
PCLATH
2.3.1
COMPUTED GOTO
A computed GOTO is accomplished by adding an offset
to the program counter (ADDWF PCL). When doing a
table read using a computed GOTO method, care
should be exercised if the table location crosses a PCL
memory boundary (each 256-byte block). Refer to the
application note, AN556, “Implementing a Table Read”.
2.3.2
STACK
The PIC16F87/88 family has an 8-level deep x 13-bit
wide hardware stack. The stack space is not part of
either program or data space and the Stack Pointer is not
readable or writable. The PC is PUSHed onto the stack
when a CALL instruction is executed or an interrupt
causes a branch. The stack is POPed in the event of a
RETURN, RETLW or a RETFIE instruction execution.
PCLATH is not affected by a PUSH or POP operation.
The stack operates as a circular buffer. This means that
after the stack has been PUSHed eight times, the ninth
push overwrites the value that was stored from the first
push. The tenth push overwrites the second push (and
so on).
 2005 Microchip Technology Inc.
Note 1: There are no status bits to indicate stack
overflow or stack underflow conditions.
2: There are no instructions/mnemonics
called PUSH or POP. These are actions
that occur from the execution of the
CALL, RETURN, RETLW and RETFIE
instructions, or the vectoring to an
interrupt address.
2.4
Program Memory Paging
All PIC16F87/88 devices are capable of addressing a
continuous 8K word block of program memory. The
CALL and GOTO instructions provide only 11 bits of
address to allow branching within any 2K program
memory page. When doing a CALL or GOTO instruction,
the upper 2 bits of the address are provided by
PCLATH<4:3>. When doing a CALL or GOTO instruc-
Instruction with
tion, the user must ensure that the page select bits are
PCL as
programmed so that the desired program memory
Destination
page is addressed. If a return from a CALL instruction
ALU
(or interrupt) is executed, the entire 13-bit PC is popped
off
the
stack.
PCLATH<4:3> bits is not required for the RETURN
instructions (which POPs the address from the stack).
Note:
The contents of the PCLATH register are
unchanged after a RETURN or RETFIE
GOTO,CALL
instruction is executed. The user must
rewrite the contents of the PCLATH regis-
Opcode <10:0>
ter for any subsequent subroutine calls or
GOTO instructions.
Example 2-1 shows the calling of a subroutine in
page 1 of the program memory. This example assumes
that PCLATH is saved and restored by the Interrupt
Service Routine (if interrupts are used).
EXAMPLE 2-1:
ORG 0x500
BCF PCLATH, 4
BSF PCLATH, 3 ;Select page 1
CALL SUB1_P1
:
:
ORG 0x900
SUB1_P1
:
:
RETURN
PIC16F87/88
Therefore,
manipulation
of
the
CALL OF A SUBROUTINE
IN PAGE 1 FROM PAGE 0
;(800h-FFFh)
;Call subroutine in
;page 1 (800h-FFFh)
;page 1 (800h-FFFh)
;called subroutine
;page 1 (800h-FFFh)
;return to
;Call subroutine
;in page 0
;(000h-7FFh)
DS30487C-page 25