PIC16F88

Manufacturer Part NumberPIC16F88
ManufacturerMicrochip Technology Inc.
PIC16F88 datasheet
 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
Page 81
82
Page 82
83
Page 83
84
Page 84
85
Page 85
86
Page 86
87
Page 87
88
Page 88
89
Page 89
90
Page 90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
Page 81/228:

TIMER2 MODULE

Download datasheet (5Mb)Embed
PrevNext
8.0

TIMER2 MODULE

Timer2 is an 8-bit timer with a prescaler and a
postscaler. It can be used as the PWM time base for the
PWM mode of the CCP1 module. The TMR2 register is
readable and writable and is cleared on any device
Reset.
The input clock (F
/4) has a prescale option of 1:1,
OSC
1:4
or
1:16,
selected
by
T2CKPS1:T2CKPS0 (T2CON<1:0>).
The Timer2 module has an 8-bit period register, PR2.
Timer2 increments from 00h until it matches PR2 and
then resets to 00h on the next increment cycle. PR2 is
a readable and writable register. The PR2 register is
initialized to FFh upon Reset.
The match output of TMR2 goes through a 4-bit
postscaler (which gives a 1:1 to 1:16 scaling inclusive)
to generate a TMR2 interrupt (latched in flag bit
TMR2IF (PIR1<1>)).
Timer2 can be shut off by clearing control bit TMR2ON
(T2CON<2>) to minimize power consumption.
Register 8-1 shows the Timer2 Control register.
Additional information on timer modules is available in
®
the “PICmicro
Mid-Range MCU Family Reference
Manual” (DS33023).
 2005 Microchip Technology Inc.
8.1
Timer2 Prescaler and Postscaler
The prescaler and postscaler counters are cleared
when any of the following occurs:
• A write to the TMR2 register
• A write to the T2CON register
• Any device Reset (Power-on Reset, MCLR, WDT
Reset or Brown-out Reset)
control
bits
TMR2 is not cleared when T2CON is written.
8.2
Output of TMR2
The output of TMR2 (before the postscaler) is fed to the
Synchronous Serial Port module (SSP) which optionally
uses it to generate a shift clock.
FIGURE 8-1:
Sets Flag
TMR2
bit TMR2IF
Output
Reset
Postscaler
1:1
to
1:16
4
Note 1:
TMR2 register output can be software selected by the
SSP module as a baud clock.
PIC16F87/88
TIMER2 BLOCK DIAGRAM
(1)
Prescaler
TMR2 reg
F
/4
OSC
1:1, 1:4, 1:16
2
Comparator
EQ
PR2 reg
DS30487C-page 79