PIC16F88

Manufacturer Part NumberPIC16F88
ManufacturerMicrochip Technology Inc.
PIC16F88 datasheet
 
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Page 90/228:

SSPSTAT: SYNCHRONOUS SERIAL PORT STATUS REGISTER

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PIC16F87/88
REGISTER 10-1:
SSPSTAT: SYNCHRONOUS SERIAL PORT STATUS REGISTER (ADDRESS 94h)
R/W-0
R/W-0
SMP
bit 7
bit 7
SMP: SPI Data Input Sample Phase bit
SPI Master mode:
1 = Input data sampled at end of data output time
0 = Input data sampled at middle of data output time (Microwire)
SPI Slave mode:
This bit must be cleared when SPI is used in Slave mode.
2
I
C mode:
This bit must be maintained clear.
bit 6
CKE: SPI Clock Edge Select bit
1 = Transmit occurs on transition from active to Idle clock state
0 = Transmit occurs on transition from Idle to active clock state
Note:
Polarity of clock state is set by the CKP bit (SSPCON<4>).
bit 5
D/A: Data/Address bit (I
2
In I
C Slave mode:
1 = Indicates that the last byte received was data
0 = Indicates that the last byte received was address
(1)
bit 4
P: Stop bit
(I
1 = Indicates that a Stop bit has been detected last
0 = Stop bit was not detected last
(1)
bit 3
S: Start bit
(I
1 = Indicates that a Start bit has been detected last (this bit is ‘0’ on Reset)
0 = Start bit was not detected last
bit 2
R/W: Read/Write Information bit (I
Holds the R/W bit information following the last address match and is only valid from address
match to the next Start bit, Stop bit or ACK bit.
1 = Read
0 = Write
bit 1
UA: Update Address bit (10-bit I
1 = Indicates that the user needs to update the address in the SSPADD register
0 = Address does not need to be updated
bit 0
BF: Buffer Full Status bit
Receive (SPI and I
1 = Receive complete, SSPBUF is full
0 = Receive not complete, SSPBUF is empty
2
Transmit (in I
1 = Transmit in progress, SSPBUF is full (8 bits)
0 = Transmit complete, SSPBUF is empty
Note 1: This bit is cleared when the SSP module is disabled (i.e., the SSPEN bit is cleared).
Legend:
R = Readable bit
-n = Value at POR
DS30487C-page 88
R-0
R-0
R-0
(1)
CKE
D/A
P
S
2
C mode only)
2
C mode only)
2
C mode only)
2
C mode only)
2
C mode only)
2
C modes):
C mode only):
W = Writable bit
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
‘0’ = Bit is cleared
R-0
R-0
R-0
(1)
R/W
UA
BF
bit 0
x = Bit is unknown
 2005 Microchip Technology Inc.