SG3525A ON Semiconductor, SG3525A Datasheet

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SG3525A

Manufacturer Part Number
SG3525A
Description
Manufacturer
ON Semiconductor
Datasheet

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SG3525A
Pulse Width Modulator
Control Circuit
improved performance and lower external parts count when
implemented for controlling all types of switching power supplies.
The on−chip +5.1 V reference is trimmed to "1% and the error
amplifier has an input common−mode voltage range that includes the
reference voltage, thus eliminating the need for external divider
resistors. A sync input to the oscillator enables multiple units to be
slaved or a single unit to be synchronized to an external system clock.
A wide range of deadtime can be programmed by a single resistor
connected between the C
features built−in soft−start circuitry, requiring only an external timing
capacitor. A shutdown pin controls both the soft−start circuitry and the
output stages, providing instantaneous turn off through the PWM latch
with pulsed shutdown, as well as soft−start recycle with longer
shutdown commands. The under voltage lockout inhibits the outputs
and the changing of the soft−start capacitor when V
nominal. The output stages are totem−pole design capable of sinking
and sourcing in excess of 200 mA. The output stage of the SG3525A
features NOR logic resulting in a low output for an off−state.
Features
*For additional information on our Pb−Free strategy and soldering details, please
January, 2005 − Rev. 5
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
The SG3525A pulse width modulator control circuit offers
8.0 V to 35 V Operation
5.1 V " 1.0% Trimmed Reference
100 Hz to 400 kHz Oscillator Range
Separate Oscillator Sync Pin
Adjustable Deadtime Control
Input Undervoltage Lockout
Latching PWM to Prevent Multiple Pulses
Pulse−by−Pulse Shutdown
Dual Source/Sink Outputs: "400 mA Peak
Pb−Free Packages are Available*
Semiconductor Components Industries, LLC, 2005
T
and Discharge pins. This device also
CC
is below
1
16
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
16
1
Noninv. Input
OSC. Output
Discharge
Soft−Start
Inv. Input
ORDERING INFORMATION
1
Sync
C
R
PIN CONNECTIONS
T
http://onsemi.com
A
WL = Wafer Lot
YY = Year
WW = Work Week
T
1
2
3
4
5
6
7
8
DW SUFFIX
CASE 751G
CASE 648
SOIC−16L
N SUFFIX
= Assembly Location
PDIP−16
(Top View)
Publication Order Number:
16
1
16
16
15
14
13
12
11
10
1
9
DIAGRAMS
V
V
Output B
V
Ground
Output A
Shutdown
Compensation
MARKING
AWLYYWW
SG3525AN
AWLYYWW
ref
CC
C
SG3525A
SG3525A/D

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SG3525A Summary of contents

Page 1

... The under voltage lockout inhibits the outputs and the changing of the soft−start capacitor when V nominal. The output stages are totem−pole design capable of sinking and sourcing in excess of 200 mA. The output stage of the SG3525A features NOR logic resulting in a low output for an off−state. Features 8 Operation 5.1 V " ...

Page 2

... SOIC−16L SOIC−16L (Pb−Free) SOIC−16L SOIC−16L (Pb−Free) http://onsemi.com Output A 11 NOR NOR 14 Output B SG3525A Output Stage † Shipping 25 Units / Rail 25 Units / Rail 47 Units / Rail 47 Units / Rail 1000 Tape & Reel 1000 Tape & Reel ...

Page 3

... An alternate approach is the use of the shutdown circuitry of Pin 10 which has been improved to enhance the available shutdown options. Activating this circuit by applying a positive signal on Pin 10 performs two functions: the PWM SG3525A Symbol ...

Page 4

... C low high 4. Since long term stability cannot be measured on each device before shipment, this specification is an engineering estimate of average stability from lot to lot. 5. Tested kHz (R = 3.6 kW, C osc T SG3525A (V = +20 Vdc [Note 3], unless otherwise noted low high = +25 C) ...

Page 5

... V (Note 6) C Rise Time (C = 1.0 nF Fall Time (C = 1.0 nF Shutdown Delay ( Supply Current ( Applies to SG3525A only, due to polarity of output pulses. V ref 0.1 Clock 3.0k Sync PWM ADJ. RT 1.0k Deadtime 1.5k 0.009 Ramp 100W 0.001 0.1 Comp 10k ...

Page 6

... 2.0k 14k Q11 3 Q10 2.0k Sync 5.0pF 7 Discharge 400mA Q4 Q2 23k Q7 1.0k 1.0k 12 GND Figure 7. Oscillator Schematic SG3525A 500 400 300 = 200 100 0.2 0.5 Figure 4. Oscillator Discharge Time versus − ...

Page 7

... C1 and C2. Figure 11. Push−Pull Configuration +V supply T1 V SG3525A GND Low power transformers can be driven directly by the SG3525A. Automatic reset occurs during deadtime, when both ends of the primary winding are switched to ground. Figure 13. Driving Transformers in a http://onsemi.com ...

Page 8

... −T− 0.25 (0.010 SG3525A PACKAGE DIMENSIONS PDIP−16 N SUFFIX CASE 648−08 ISSUE T NOTES: 1. DIMENSIONING AND TOLERANCING PER 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS 4. DIMENSION B DOES NOT INCLUDE 5. ROUNDED CORNERS OPTIONAL. L SEATING PLANE ...

Page 9

... SEATING e PLANE 14X T SG3525A SOIC−16L DW SUFFIX CASE 751G−03 ISSUE C NOTES: 1. DIMENSIONS ARE IN MILLIMETERS INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INLCUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION ...

Page 10

... USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 10 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. SG3525A/D ...

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