SN74LVC1G02DBV

Manufacturer Part NumberSN74LVC1G02DBV
ManufacturerTexas Instruments, Inc.
SN74LVC1G02DBV datasheet
 


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EPIC
(Enhanced-Performance Implanted
CMOS) Submicron Process
I
Feature Supports Partial-Power-Down
off
Mode Operation
Supports 5-V V
Operation
CC
Package Options Include Plastic
Small-Outline Transistor (DBV, DCK)
Packages
description
This single 2-input positive-NOR gate is designed for 1.65-V to 5.5-V V
The SN74LVC1G02 performs the Boolean function Y = A + B or Y = A B in positive logic.
This device is fully specified for partial-power-down applications using I
preventing damaging current backflow through the device when it is powered down.
The SN74LVC1G02 is characterized for operation from –40 C to 85 C.
logic symbol
A
B
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
SINGLE 2-INPUT POSITIVE-NOR GATE
SCES213B – APRIL 1999 – REVISED FEBRUARY 2000
FUNCTION TABLE
INPUTS
OUTPUT
Y
A
B
H
X
L
X
H
L
L
L
H
1
1
2
1
A
4
Y
2
B
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
SN74LVC1G02
DBV OR DCK PACKAGE
(TOP VIEW)
A
V
1
5
CC
B
2
GND
Y
3
4
operation.
CC
. The I
circuitry disables the outputs,
off
off
4
Y
Copyright
2000, Texas Instruments Incorporated
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