74LVTH162244MTX Fairchild Semiconductor, 74LVTH162244MTX Datasheet

74LVTH162244MTX

Manufacturer Part Number

74LVTH162244MTX

Description

IC BUFF DVR TRI-ST 16BIT 48TSSOP

Manufacturer

Fairchild Semiconductor

Series

74LVTHr

Datasheet

1.74LVTH162244MTX.pdf (8 pages)

Specifications of 74LVTH162244MTX

Logic Type

Buffer/Line Driver, Non-Inverting

Number Of Elements

Number Of Bits Per Element

Current - Output High, Low

12mA, 12mA

Voltage - Supply

2.7 V ~ 3.6 V

Operating Temperature

-40°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

48-TSSOP

Logic Family

LVT

Number Of Channels Per Chip

Polarity

Non-Inverting

Supply Voltage (max)

3.6 V

Supply Voltage (min)

2.7 V

Maximum Operating Temperature

+ 85 C

Mounting Style

SMD/SMT

High Level Output Current

- 12 mA

Low Level Output Current

12 mA

Minimum Operating Temperature

- 40 C

Number Of Lines (input / Output)

16 / 16

Output Type

3-State

Propagation Delay Time

4.8 ns at 2.7 V, 4 ns at 3.3 V

Logic Device Type

Buffer/Line Driver, Non Inverting

Supply Voltage Range

2.7V To 3.6V

Logic Case Style

TSSOP

No. Of Pins

Operating Temperature Range

-40Â°C To +85Â°C

Family Type

LVTH

Rohs Compliant

Yes

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Other names

74LVTH162244MTXTR

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Meier Automation Equipment Co., Limited

Part Number:

74LVTH162244MTX

Manufacturer:

FAIRCHILD/仙童

Quantity:

20 000

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74LVT162244G

(Note 1)(Note 2)

74LVT162244MEA

(Note 2)

74LVT162244MTD

(Note 2)

74LVTH162244G

(Note 1)(Note 2)

74LVTH162244MEA

74LVTH162244MEX

74LVTH162244MTD

74LVTH162244MTX

74LVT162244 • 74LVTH162244

Low Voltage 16-Bit Buffer/Line Driver

with 3-STATE Outputs

and 25: Series Resistors in the Outputs

General Description

The LVT162244 and LVTH162244 contain sixteen non-

inverting buffers with 3-STATE outputs designed to be

employed as a memory and address driver, clock driver, or

bus oriented transmitter/receiver. The device is nibble con-

trolled. Individual 3-STATE control inputs can be shorted

together for 8-bit or 16-bit operation.

The LVT162244 and LVTH162244 are designed with

equivalent 25

LOW states of the output. This design reduces line noise in

applications such as memory address drivers, clock driv-

ers, and bus transceivers/transmitters.

The LVTH162244 data inputs include bushold, eliminating

the need for external pull-up resistors to hold unused

inputs.

These buffers and line drivers are designed for low-voltage

(3.3V) V

TTL interface to a 5V environment. The LVT162244 and

LVTH162244 are fabricated with an advanced BiCMOS

technology to achieve high speed operation similar to 5V

ABT while maintaining a low power dissipation.

Ordering Code:

Note 1: Ordering code “G” indicates Trays.

Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Order Number

applications, but with the capability to provide a

series resistance in both the HIGH and

Package

BGA54A

Number

MS48A

MTD48

MS48A

MTD48

54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide

48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide

48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

[Tube]

48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

[Tape and Reel]

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

[Tube]

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

[Tape and Reel]

DS012445

Features

Input and output interface capability to systems at

5V V

Bushold data inputs eliminate the need for external pull-

up resistors to hold unused inputs (74LVTH162244),

also available without bushold feature (74LVT162244).

Live insertion/extraction permitted

Power Up/Power Down high impedance provides glitch-

free bus loading

Outputs include equivalent series resistance of 25

make external termination resistors unnecessary and

reduce overshoot and undershoot

Functionally compatible with the 74 series 162244

Latch-up performance exceeds 500 mA

ESD performance:

Human-body model

Machine model

Charged-device

Also packaged in plastic Fine-Pitch Ball Grid Array

(FBGA)

Package Description

200V

1000V

2000V

March 1999

Revised June 2005

www.fairchildsemi.com

Related parts for 74LVTH162244MTX

74LVTH162244MTX Summary of contents

Page 1

... Reel] 74LVTH162244MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide [Tube] 74LVTH162244MTX MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide [Tape and Reel] Note 1: Ordering code “G” indicates Trays. Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. ...

Page 2

Logic Symbol Connection Diagrams Pin Assignment for SSOP and TSSOP Pin Assignment for FBGA (Top Thru View) www.fairchildsemi.com Pin Descriptions Pin Names Description OE Output Enable Inputs (Active LOW –I Inputs –O Outputs 0 15 ...

Page 3

Functional Description The LVT162244 and LVTH162244 contain sixteen non-inverting buffers with 3-STATE outputs. The device is nibble (4 bits) controlled with each nibble functioning identically, but independent of the other. The control pins can be shorted together to obtain full ...

Page 4

Absolute Maximum Ratings Symbol Parameter V Supply Voltage Input Voltage I V Output Voltage Input Diode Current Output Diode Current Output Current Supply Current per ...

Page 5

DC Electrical Characteristics Symbol Parameter I Power Supply Current CCZ ' I Increase in Power Supply Current CC (Note 8) Note 5: Applies to bushold versions only (74LVTH162244). Note 6: An external driver must source at least the specified ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide www.fairchildsemi.com Package Number BGA54A 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide Package Number MS48A 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...

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