74LVT16244MTD Fairchild Semiconductor, 74LVT16244MTD Datasheet

74LVT16244MTD

Manufacturer Part Number

74LVT16244MTD

Description

IC BUFF DVR TRI-ST 16BIT 48TSSOP

Manufacturer

Fairchild Semiconductor

Series

74LVTr

Datasheet

1.74LVT16244MTDX.pdf (7 pages)

Specifications of 74LVT16244MTD

Logic Type

Buffer/Line Driver, Non-Inverting

Number Of Elements

Number Of Bits Per Element

Current - Output High, Low

32mA, 64mA

Voltage - Supply

2.7 V ~ 3.6 V

Operating Temperature

-40°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

48-TSSOP

Logic Device Type

Buffer, Non Inverting

Supply Voltage Range

2.7V To 3.6V

Logic Case Style

TSSOP

No. Of Pins

Operating Temperature Range

-65Â°C To +150Â°C

Svhc

No SVHC (15-Dec-2010)

Rohs Compliant

Yes

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

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Company

Part Number

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Quantity

Price

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Part Number:

74LVT16244MTDX

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Manufacturer:

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Company:

Meier Automation Equipment Co., Limited

Part Number:

74LVT16244MTDX

Manufacturer:

FAIRCHILD/仙童

Quantity:

20 000

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Download datasheet (90Kb)

74LVT16244G

(Note 1)(Note 2)

74LVT16244MEA

(Note 2)

74LVT16244MTD

(Note 2)

74LVTH16244G

(Note 1)(Note 2)

74LVTH16244MEA

(Note 2)

74LVTH16244MTD

(Note 2)

74LVT16244 • 74LVTH16244

Low Voltage16-Bit Buffer/Line Driver

with 3-STATE Outputs

General Description

The LVT16244 and LVTH16244 contain sixteen non-invert-

ing buffers with 3-STATE outputs designed to be employed

as a memory and address driver, clock driver, or bus ori-

ented transmitter/receiver. The device is nibble controlled.

Individual 3-STATE control inputs can be shorted together

for 8-bit or 16-bit operation.

The LVTH16244 data inputs include bushold, eliminating

the need for external pull-up resistors to hold unused

inputs.

These buffers and line drivers are designed for low-voltage

(3.3V) V

TTL interface to a 5V environment. The LVT16244 and

LVTH16244 are fabricated with an advanced BiCMOS

technology to achieve high speed operation similar to 5V

ABT while maintaining a low power dissipation

Ordering Code:

Note 1: Ordering code “G” indicates Trays.

Note 2: Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbol

Order Number

applications, but with the capability to provide a

(Preliminary)

Package

Number

BGA54A

MS48A

MTD48

MS48A

MTD48

54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide

48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide

48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

DS500151

Features

Input and output interface capability to systems at

5V V

Bushold data inputs eliminate the need for external

pull-up resistors to hold unused inputs (74LVTH16244),

also available without bushold feature (74LVT16244).

Live insertion/extraction permitted

Power Up/Down high impedance provides glitch-free

bus loading

Outputs source/sink

Functionally compatible with the 74 series 16244

Latch-up performance exceeds 500 mA

ESD performance:

Human-body model

Machine model

Charged-drive model

Also packaged in plastic Fine-Pitch Ball Grid Array

(FBGA)

Package Description

200V

2000V

32 mA/

1000V

March 1999

Revised June 2005

64 mA

www.fairchildsemi.com

Related parts for 74LVT16244MTD

74LVT16244MTD Summary of contents

Page 1

... MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide (Note 2) 74LVT16244MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide (Note 2) 74LVTH16244G BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide ...

Page 2

Connection Diagrams Pin Assignment for SSOP and TSSOP Pin Assignment for FBGA (Top Thru View) Logic Diagram www.fairchildsemi.com Pin Descriptions Pin Names Description OE Output Enable Inputs (Active LOW –I Inputs –O Outputs 0 15 ...

Page 3

Absolute Maximum Ratings Symbol Parameter V Supply Voltage Input Voltage I V Output Voltage Input Diode Current Output Diode Current Output Current Supply Current per ...

Page 4

DC Electrical Characteristics Symbol Parameter I Power Supply Current CCH I Power Supply Current CCL I Power Supply Current CCZ I Power Supply Current CCZ ' I Increase in Power Supply Current CC (Note 8) Note 5: Applies to ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide Package Number BGA54A 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide www.fairchildsemi.com Package Number MS48A 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...

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