AM29LV400BT-70EC Advanced Micro Devices, AM29LV400BT-70EC Datasheet

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AM29LV400BT-70EC

Manufacturer Part Number
AM29LV400BT-70EC
Description
Manufacturer
Advanced Micro Devices
Datasheet

Specifications of AM29LV400BT-70EC

Case
TSOP

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Am29LV400B
4 Megabit (512 K x 8-Bit/256 K x 16-Bit)
CMOS 3.0 Volt-only Boot Sector Flash Memory
DISTINCTIVE CHARACTERISTICS
This Data Sheet states AMD’s current technical specifications regarding the Products described herein. This Data
Sheet may be revised by subsequent versions or modifications due to changes in technical specifications.
Single power supply operation
— Full voltage range: 2.7 to 3.6 volt read and write
— Regulated voltage range: 3.0 to 3.6 volt read and
Manufactured on 0.32 µm process technology
— Compatible with 0.5 µm Am29LV400 device
High performance
— Full voltage range: access times as fast as 70 ns
— Regulated voltage range: access times as fast as
Ultra low power consumption (typical values at
5 MHz)
— 200 nA Automatic Sleep mode current
— 200 nA standby mode current
— 7 mA read current
— 15 mA program/erase current
Flexible sector architecture
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
— One 8 Kword, two 4 Kword, one 16 Kword, and
— Supports full chip erase
— Sector Protection features:
Unlock Bypass Program Command
— Reduces overall programming time when issuing
operations for battery-powered applications
write operations for compatibility with high
performance 3.3 volt microprocessors
55 ns
seven 64 Kbyte sectors (byte mode)
seven 32 Kword sectors (word mode)
A hardware method of locking a sector to prevent
any program or erase operations within that sector
Sectors can be locked in-system or via
programming equipment
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
multiple program command sequences
Top or bottom boot block configurations
available
Embedded Algorithms
— Embedded Erase algorithm automatically
— Embedded Program algorithm automatically
Minimum 1,000,000 write cycle guarantee per sector
20-year data retention at 125 C
— Reliable operation for the life of the system
Package option
— 48-ball FBGA
— 48-pin TSOP
— 44-pin SO
Compatibility with JEDEC standards
— Pinout and software compatible with single-
— Superior inadvertent write protection
Data# Polling and toggle bits
— Provides a software method of detecting program
Ready/Busy# pin (RY/BY#)
— Provides a hardware method of detecting
Erase Suspend/Erase Resume
— Suspends an erase operation to read data from,
Hardware reset pin (RESET#)
— Hardware method to reset the device to reading
preprograms and erases the entire chip or any
combination of designated sectors
writes and verifies data at specified addresses
power supply Flash
or erase operation completion
program or erase cycle completion
or program data to, a sector that is not being
erased, then resumes the erase operation
array data
Publication# 21523
Issue Date: November 8, 2000
Rev: D Amendment/+1

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