74LVT16244BDL,118 NXP Semiconductors, 74LVT16244BDL,118 Datasheet

IC BUFF DVR TRI-ST 16BIT 48SSOP

74LVT16244BDL,118

Manufacturer Part Number
74LVT16244BDL,118
Description
IC BUFF DVR TRI-ST 16BIT 48SSOP
Manufacturer
NXP Semiconductors
Series
74LVTr
Datasheet

Specifications of 74LVT16244BDL,118

Package / Case
48-SSOP
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
4
Number Of Bits Per Element
4
Current - Output High, Low
32mA, 64mA
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Logic Family
LVT
Number Of Channels Per Chip
16
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
High Level Output Current
- 32 mA
Input Bias Current (max)
6000 uA
Low Level Output Current
64 mA
Minimum Operating Temperature
- 40 C
Output Type
3-State
Propagation Delay Time
1.8 ns (Typ) @ 3.3 V
Number Of Lines (input / Output)
16 / 16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74LVT16244BDL-T
74LVT16244BDL-T
935183090118
1. General description
2. Features and benefits
3. Ordering information
Table 1.
Type number
74LVT16244BDL
74LVTH16244BDL
74LVT16244BDGG
74LVTH16244BDGG
74LVT16244BEV
74LVT16244BBQ
74LVTH16244BBQ
Ordering information
Package
Temperature range
−40 °C to +85 °C
−40 °C to +85 °C
−40 °C to +85 °C
−40 °C to +85 °C
The 74LVT16244B; 74LVTH16244B is a high-performance BiCMOS product designed for
V
This device is a 16-bit buffer and line driver featuring non-inverting 3-state bus outputs.
The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer.
CC
74LVT16244B; 74LVTH16244B
3.3 V 16-bit buffer/driver; 3-state
Rev. 08 — 22 March 2010
16-bit bus interface
3-state buffers
Output capability: +64 mA and −32 mA
TTL input and output switching levels
Input and output interface capability to systems at 5 V supply
Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs
Power-up 3-state
Live insertion and extraction permitted
No bus current loading when output is tied to 5 V bus
Latch-up protection
ESD protection:
operation at 3.3 V.
JESD78B Class II exceeds 500 mA
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Name
SSOP48
TSSOP48
VFBGA56
HXQFN60U plastic thermal enhanced extremely thin quad
Description
plastic shrink small outline package; 48 leads;
body width 7.5 mm
plastic thin shrink small outline package;
48 leads; body width 6.1 mm
plastic very thin fine-pitch ball grid array
package; 56 balls; body 4.5 × 7 × 0.65 mm
flat package; no leads; 60 terminals; UTLP
based; body 4 × 6 × 0.5 mm
Product data sheet
Version
SOT370-1
SOT362-1
SOT702-1
SOT1134-1

Related parts for 74LVT16244BDL,118

74LVT16244BDL,118 Summary of contents

Page 1

V 16-bit buffer/driver; 3-state Rev. 08 — 22 March 2010 1. General description The 74LVT16244B; 74LVTH16244B is a high-performance BiCMOS product designed for V operation at 3 This device is a 16-bit buffer and line ...

Page 2

... NXP Semiconductors 4. Functional diagram 1A0 1Y0 47 2 1A1 1Y1 46 3 1A2 1Y2 44 5 1A3 1Y3 43 6 1OE 1 2A0 2Y0 41 8 2A1 2Y1 40 9 2A2 2Y2 38 11 2A3 2Y3 37 12 2OE 48 Pin numbers are shown for SSOP48 and TSSOP48 packages only. Fig 1. Logic symbol ...

Page 3

... NXP Semiconductors 5. Pinning information 5.1 Pinning 74LVT16244B 74LVTH16244B 1 1OE 1Y0 2 1Y1 3 GND 4 1Y2 5 6 1Y3 2Y0 8 2Y1 9 GND 10 11 2Y2 12 2Y3 3Y0 13 3Y1 14 GND 15 16 3Y2 17 3Y3 4Y0 19 4Y1 20 21 GND 22 4Y2 4Y3 23 4OE 24 Fig 3. Pin configuration SOT370-1 (SSOP48) and SOT362-1 (TSSOP48) ...

Page 4

... NXP Semiconductors terminal 1 index area (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig 5. Pin configuration SOT1134-1 (HXQFN60U) 5.2 Pin description Table 2. Pin description Symbol Pin SOT370-1 and SOT362-1 1OE, 2OE, ...

Page 5

... NXP Semiconductors Table 2. Pin description …continued Symbol Pin SOT370-1 and SOT362-1 GND 4, 10, 15, 21, 28, 34, 39 18, 31 1A0 to 1A3 47, 46, 44, 43 2A0 to 2A3 41, 40, 38, 37 3A0 to 3A3 36, 35, 33, 32 4A0 to 4A3 30, 29, 27 Functional description [1] Table 3. Function table Control nOE [ HIGH voltage level LOW voltage level don’t care high-impedance OFF-state. ...

Page 6

... NXP Semiconductors Table 4. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter P total power dissipation tot [1] The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. ...

Page 7

... NXP Semiconductors 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter = −40 °C to +85 °C [1] T amb V input clamping voltage IK V HIGH-level output voltage LOW-level output voltage input leakage current I I power-off leakage current V ...

Page 8

... NXP Semiconductors Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter I supply current CC ΔI additional supply current CC C input capacitance I C output capacitance O [1] Typical values are measured at V [2] Unused pins GND. CC [3] This is the bus hold overdrive current required to force the input to the opposite logic state. ...

Page 9

... NXP Semiconductors 11. Waveforms Measurements points are given in V and V are typical voltage output levels that occur with the output load Fig 6. Propagation delay input (nAn) to output (nYn) nOE input nYn output nYn output Measurements points are given in V and V are typical voltage output levels that occur with the output load. ...

Page 10

... NXP Semiconductors Test data is given in Table Definitions test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to output impedance External voltage for measuring switching times. EXT Fig 8. Load circuit for measuring switching times Table 9. Test data ...

Page 11

... NXP Semiconductors 12. Package outline SSOP48: plastic shrink small outline package; 48 leads; body width 7 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.4 2.35 mm 2.8 0.25 0.2 2.20 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE ...

Page 12

... NXP Semiconductors TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6 pin 1 index 1 DIMENSIONS (mm are the original dimensions). A UNIT max. 0.15 1.05 mm 1.2 0.25 0.05 0.85 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 13

... NXP Semiconductors VFBGA56: plastic very thin fine-pitch ball grid array package; 56 balls; body 4 0.65 mm ball A1 index area ball A1 1 index area DIMENSIONS (mm are the original dimensions) A UNIT max. 0.3 0.7 0. 0.2 0.6 0.35 OUTLINE VERSION IEC SOT702-1 Fig 11. Package outline SOT702-1 (VFBGA56) ...

Page 14

... NXP Semiconductors HXQFN60U: plastic thermal enhanced extremely thin quad flat package; no leads; 60 terminals; UTLP based; body 0.5 mm terminal 1 index area A10 terminal 1 index area D1 Dimensions Unit max 0.50 0.05 0.35 4.1 mm nom 0.48 0.02 0.30 4.0 min 0.46 0.00 0.25 3.9 ...

Page 15

... NXP Semiconductors 13. Abbreviations Table 10. Abbreviations Acronym Description BiCMOS Bipolar Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 11. Revision history Document ID Release date 74LVT_LVTH16244B_8 20100322 • Modifications: 74LVT16244BBQ and 74LVTH16244BBQ changed from HUQFN60U (SOT1025-1) to HXQFN60U (SOT1134-1) package ...

Page 16

... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...

Page 17

... NXP Semiconductors 16. Contact information For more information, please visit: For sales office addresses, please send an email to: 74LVT_LVTH16244B_8 Product data sheet 74LVT16244B; 74LVTH16244B http://www.nxp.com salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. Rev. 08 — 22 March 2010 3.3 V 16-bit buffer/driver; 3-state © ...

Page 18

... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Functional description . . . . . . . . . . . . . . . . . . . 5 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 13 Abbreviations ...

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