PEB2046NVA3 Siemens Semiconductor Group, PEB2046NVA3 Datasheet

PEB2046NVA3

Manufacturer Part Number

PEB2046NVA3

Description

Manufacturer

Siemens Semiconductor Group

Datasheet

1.PEB2046NVA3.pdf (1 pages)

Specifications of PEB2046NVA3

Case

PLCC44

97+

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Memory Time Switch Small (MTSS)

General Description

The MTSS PEB 2046 is a monolithic CMOS device which has

the ability to connect any of the 256 PCM channels of eight

incoming PCM lines to any of the 256 PCM channels of eight

output lines.

The input information of a complete frame is stored in the

speech memory SM. The incoming 256 channels

of 8 bits each are written in sequence into fixed positions in

the SM. This is controlled by the input counter in the timing

control block with an 8-kHz repetition rate.

For output, the connection memory (CM) is read in sequence.

Each location in CM points to a location in the speech

memory. The byte in this speech memory location is read into

the current output time-slot. The read access of the CM is

controlled by the output counter which also resides in the

timing control block.

Thus the CM needs to be programmed beforehand for the

desired connection. The CM address corresponds to one

particular output time-slot and line number. The contents of

this CM-address point to a particular input time-slot and line

number (now resident in the SM).

Siemens Aktiengesellschaft

DB7-

DB0

Block Diagram

Interface

MOD

CGR

STA

IAR

Timing Control

Connection

Memory

CLK

Type

PEB 2046-N

PEB 2046-P

Features

• Time/space switch for 2.048-kbit/s PCM systems

• Switching of up to 256 incoming PCM channels to up to

• Eight input and eight output PCM lines

• Configurable for a 4096- and 8192-kHz device clock

• Tristate function for further expansion and tandem

• 8-bit P-interface

• Single +5-V power supply

• Advanced low power CMOS technology

256 outgoing PCM channels

operation

Speech Memory

Output Buffer

Input Buffer

Package

P-LCC-44-1 (SMD)

P-DIP-40-1

PEB 2046

ITB00604

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