PM5361-RI PMC-Sierra, Inc., PM5361-RI Datasheet - Page 63

• Manufacturer Part Number: PM5361-RI
• Description: SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR
• Manufacturer: PMC-Sierra, Inc.

DATA SHEET
PMC-920526
Register 28H-2EH, 48H-4EH, 68H-6EH: TU #2 in TUG2 #1 to TUG2 #7,
Configuration and Status
This set of registers reports the status and configures the operational modes of
TU #2 in TUG2 #1 to TUG2 #7. These registers have no effect in TU3 mode.
When the corresponding TUG2 tributary group is configured to TU2 (VT6) mode,
the associated register in this set has no effect.
IPAIS:
IIDLE:
DLOP:
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
The IPAIS bit enables the insertion of path AIS for tributary TU #2 in the
corresponding TUG2. Tributary path AIS is inserted by forcing all ones into all
tributary bytes. The IPAIS bit has precedence over the IIDLE and the DLOP
bits.
The IIDLE bit enables the insertion of path idle for tributary TU #2 in the
corresponding TUG2. Tributary idle is inserted with the idle code in the
tributary bytes, except for a valid pointer and a valid V5 byte that tags the
tributary as unequipped. The idle code is selectable to be all zeros or all ones
as controlled by the ICODE bit. The IIDLE bit has no effect when the IPAIS bit
is set high.
The DLOP bit allows downstream pointer processing elements to be
diagnosed. When DLOP is set high, the new data flag (NDF) field of the
outgoing payload pointer in tributary TU #2 in the corresponding TUG2 is
Type
R/W
R/W
R/W
R/W
R/W
R
R
R
ISSUE 8
CONFIG[1]
CONFIG[0]
Function
LOPV
LOPE
DLOP
IIDLE
IPAIS
PF
Default
1
1
0
0
0
0
0
0
TRIBUTARY UNIT PAYLOAD PROCESSOR
55
PM5361 TUPP