PM5361-RI PMC-Sierra, Inc., PM5361-RI Datasheet - Page 74

• Manufacturer Part Number: PM5361-RI
• Description: SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR
• Manufacturer: PMC-Sierra, Inc.

DATA SHEET
PMC-920526
Register 80H: Master Test
This register is used to enable TUPP test features. All bits, except PMCTST, are
reset to zero by a reset of the TUPP .
HIZIO,HIZDATA:
IOTST:
MOTOTST:
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
The HIZIO and HIZDATA bits control the tri-state modes of the TUPP . While
the HIZIO bit is a logic 1, all output pins of the TUPP except the data bus are
held in a high-impedance state. The microprocessor interface is still active.
While the HIZDATA bit is a logic 1, the data bus is also held in a high-
impedance state which inhibits microprocessor read cycles.
The IOTST bit is used to allow normal microprocessor access to the test
registers and control the test mode in each TSB block in the TUPP for board
level testing. When IOTST is a logic 1, all blocks are held in test mode and
the microprocessor may write to a block's test mode 0 registers to manipulate
the outputs of the block and consequently the device outputs (refer to the
"Test Mode 0 Details" in the "Test Features" section).
The MOTOTST bit is used to test the decoding of the RDB_E and WRB_RWB
control signals when MBEB is logic 0.
Type
R/W
R/W
W
W
W
ISSUE 8
MOTOTST
Function
PMCTST
HIZDATA
Unused
Unused
Unused
IOTST
HIZIO
Default
X
X
X
X
X
X
0
0
TRIBUTARY UNIT PAYLOAD PROCESSOR
66
PM5361 TUPP