PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 101

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

10.13 Transmit Tail Trace Processor (TTTP)
10.14 Transmit High Order Path Processor (THPP)
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
The TRMP calculates the line BIP-8 error detection codes on the transmit data stream. One line
BIP-8 error detection code is calculated for each of the constituent STS-1 (STM-0). The line
BIP-8 byte is calculated on the unscrambled bytes of the STS-1 (STM-0) except for the 9 SOH
bytes. The line BIP-8 byte is based on a bit interleaved parity calculation using even parity. For
each STS-1 (STM-0), the calculated BIP-8 error detection code is inserted in the B2 byte of the
following frame before scrambling. The TRMP optionally scrambles the transmit data stream.
The TRMP calculates the section BIP-8 error detection code on the transmit data stream. The
section BIP-8 byte is calculated on the scrambled bytes of the complete frame. The section BIP-8
byte is based on a bit interleaved parity calculation using even parity. The calculated BIP-8 error
detection code is inserted in the B1 byte of STS-1 (STM-0) #1 of the following frame before
scrambling.
The Transmit Tail Trace Processor (TTTP) block generates the tail trace messages to be
transmitted. The TTTP can generate a 16 or 64-byte tail trace message. The message is source
from an internal RAM and must have been previously written by an external microprocessor.
Optionally, the tail trace message can be reduced to a single continuous tail trace byte.
The tail trace message must include synchronization because the TTTP does not add
synchronization. The synchronization mechanism is different for a 16-byte message and for a 64
byte message. When the message is 16 bytes, the synchronization is based on the MSB of the tail
trace byte. Only one of the 16 bytes has its MSB set high. The byte with its MSB set high is
considered the first byte of the message. When the message is 64 bytes, the synchronization is
based on the CR/LF (CR = 0Dh, LF = 0Ah) characters of tail trace message. The byte following
the CR/LF bytes is considered the first byte of the message.
To avoid generating an unstable/mismatch message, the TTTP forces the message to all zeros
while the microprocessor updates the internal RAM.
The Transmit High Order Path Processor (THPP) block inserts the path overhead bytes in the
transmit data stream.
The THPP accumulates the path BIP-8 errors detected by the RHPP during the last receive frame.
The path BIP-8 errors are returned to the far end as path remote error indication (REI-P) during
the next transmit frame. Because the RHPP and the THPP are in two different clock domains,
none, one or two path BIP-8 errors can be accumulated per transmit frame. The minimum value
between the maximum REI-P and the accumulator count is returned as the path REI in the G1
byte. Optionally, block BIP-8 errors can be accumulated.
S/UNI-2488 Telecom Standard Product Datasheet
Released
101