PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 12

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
13.6 TXSDQ and RXSDQ “Block” Sub-Units ......................................................... 525
13.7 TXSDQ Buffer Available Operation ................................................................ 525
13.8 RXSDQ and TXSDQ Data Available and Burst-Size Operation ..................... 526
13.9 Setting ATM Mode of Operation over Utopia L3 or POS-PHY L3 .................. 527
13.10 Setting Packet Mode of Operation Over POS-PHY L3 .................................. 527
13.11 Setting Transparent Mode of Operation Over POS-PHY L3 .......................... 528
13.12 Transmit PL3 DTPA Behavior ......................................................................... 528
13.13 System Interface Error Recovery ................................................................... 533
13.14 Using the SONET/SDH Inband Error Report Processor (SIRP) .................... 535
13.15 Using the PRBS Generator and Monitor (PRGM) .......................................... 536
13.16 Using the SONET/SDH Bit Error Rate Alarm Monitor (SBER) ....................... 537
13.17 Using the SONET/SDH Alarm Reporting Controller (SARC) ......................... 538
13.18 Interrupt Service Routine ................................................................................ 540
13.19 Accessing Indirect Registers .......................................................................... 540
13.20 Using the Performance Monitoring Features.................................................. 541
13.12.1 ........................................................................................... TPAHOLD = 0
13.12.2 ........................................................................................... TPAHOLD = 1
13.13.1 ...................... Utopia Level 3 Transmit Interface Misalignment Recovery
13.13.2 ....................... Utopia Level 3 Receive Interface Misalignment Recovery
13.13.3 ..........................Utopia Level 3 Transmit Clock (TFCLK) Error Recovery
13.13.4 ............................ Utopia Level 3 Receive Clock (RFCLK) Error Recover
POS-PHY Level 3 Transmit (TFCLK) Error Recovery .................................... 534
POS-PHY Level 3 Receive (RFCLK) Error Recovery..................................... 535
13.15.1 ........................................................................................ Synchronization
13.15.2 ............................................................ Error Detection and Accumulation
13.17.1 ................................................................ SARC Indirect Register Access
13.17.2 ................................................................................... STS-48c Operation
13.17.3 ........................................................................... Sub-STS-48c Operation
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S/UNI-2488 Telecom Standard Product Datasheet
Released
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