PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 124

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PM5381-BI

Manufacturer Part Number
PM5381-BI
Description
ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
Manufacturer
PMC-Sierra, Inc.
Datasheet

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Document ID: PMC-2000489, Issue 4
Normal Mode Register Description
Normal mode registers are used to configure and monitor the operation of the S/UNI-2488.
Normal mode registers (as opposed to test mode registers) are selected when TRS (A[13]) is low.
Notes on Normal Mode Register Bits:
1. Writing values into unused register bits has no effect. However, to ensure software
2. All configuration bits that can be written into can also be read back. This allows the
3. Writable normal mode register bits are cleared to logic 0 upon reset unless otherwise noted.
4. Writing into read-only normal mode register bit locations does not affect S/UNI-2488
5. Certain register bits are reserved. These bits are associated with megacell functions that are
compatibility with future, feature-enhanced versions of this product, unused register bits must
be written with logic 0. Reading back unused bits can produce either a logic 1 or a logic 0;
hence, unused register bits should be masked off by software when read.
processor controlling the S/UNI-2488 to determine the programming state of the device.
operation unless otherwise noted.
unused in this application. To ensure that the S/UNI-2488 operates as intended, reserved
register bits must only be written with the logic level as specified. Writing other values to
reserved registers should be avoided.
S/UNI-2488 Telecom Standard Product Datasheet
Released
124

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