PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 132

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PM5381-BI

Manufacturer Part Number
PM5381-BI
Description
ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
Manufacturer
PMC-Sierra, Inc.
Datasheet

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Document ID: PMC-2000489, Issue 4
TPAIS_EN
SS_CONCAT[1:0]
SS_H1[1:0]
TREQ_ADVANCE[6:0]
CXUCLKO_OEB
The Transmit Path AIS Enable bit controls the insertion of Transmit Path AIS. When logic 0,
the S/UNI-2488 does not generate Transmit Path AIS. When logic 1, the S/UNI-2488 will
generate Transmit Path AIS. In order for proper transmit path AIS to be generated, the
TS1_PROV bit (bit 0 in register 0790H) must be set to logic 0 when TPAIS_EN is set to logic
1.
These register bits control the value of the SS field of the H1 concatenation pointer indication
for STS-48c / STM-16c for the transmit frame.
These register bits control the value of the SS field of the H1 pointer of the transmit frame.
Reserved. This field must be left in its default configuration for normal operation of the
S/UNI-2488.
This register bit is used for PMC test purposes only and must be left in its default state for the
normal operation of the S/UNI-2488.
S/UNI-2488 Telecom Standard Product Datasheet
Released
132

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