PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 157

no-image

PM5381-BI

Manufacturer Part Number
PM5381-BI
Description
ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
Manufacturer
PMC-Sierra, Inc.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PM5381-BI-P
Quantity:
119
Part Number:
PM5381-BI-P
Quantity:
6
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
SDLE
Reserved0
IDDQ_ENABLE
LOCK_TO_REF
RX2488_ENABLE
Reserved1
CRU_RESET
The Serial Diagnostic Loopback Enable (SDLE) bit, when set to ‘1’, loops the data from the
transmit line PISO to the receive side CRU/SIPO. In the loopback mode, the CRU locks to
the loopback data.
The Reserved0 bit must be set to logic 0 for normal operation.
The IDDQ_ENABLE bit activates the IDDQ (Quiescent Current) test mode. When set to
‘1’, all RX2488 Analog Circuits are disabled and the IDDQ of the digital circuits can be
measured. When this bit is set to ‘0’, all RX2488 analog circuits operate normally. This bit is
only used during production testing and should be set to logic 0 for normal operation.
The Lock to Reference bit controls the operation of the CRU state machine. When
LOCK_TO_REF is set to logic one the CRU state machine will hold the CRU in the Lock-to-
Reference state. When the CRU is reset to logic zero the CRU state machine operates
The 2.488GHz Receiver Enable bit provides a global power down of the RX2488 Analog
Block Circuit. When set to ‘0’, this bit forces the RX2488 to a low power state and
functionality is disabled. When set to ‘1’, the RX2488 operates in the normal mode of
operation.
Both the Reserved1 bits must be set to logic 1 for optimal operation.
The Clock Recovery Unit Reset bit provides a complete reset of the CRU Analog Block
Circuit. When set to ‘1’, this bit forces the CRU to a known initial state. While the bit is set to
‘1’, the functionality of the block is disabled. When set to ‘0’, the CRU operates in the
normal mode. This bit is not self-clearing. Therefore a ‘0’ must be written to the bit to remove
the reset condition.
S/UNI-2488 Telecom Standard Product Datasheet
Released
157

Related parts for PM5381-BI