PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 163

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
PRBS_ERR_CNT[7:0]
The ERR_CNT[7:0] register is the number of errors in the PRBS bytes detected during the
monitoring. Errors are accumulated only when the monitor is in the synchronized state.
Even if there are multiple errors within one PRBS byte, only one error is counted. The
transfer of the error counter to this holding register is triggered by writing to the
CLEAR_ERR_CNT bit or by writing to register 0000H, the Global Performance Monitor
Update Register. PRBS_ERR_CNT[7:0] is cleared by the CLEAR_ERR_CNT bit in this
register. The actual PRBS error counter is cleared immediately after a logic 1 is written to the
CLEAR_ERR_CNT bit. The error counter will not wrap around after reaching FFh. The
error counter will saturate to FFh.
S/UNI-2488 Telecom Standard Product Datasheet
Released
163