PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 184

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PM5381-BI

Manufacturer Part Number
PM5381-BI
Description
ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
Manufacturer
PMC-Sierra, Inc.
Datasheet

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Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
LBIPEI
LREIEI
The line BIP error interrupt status (LBIPEI) bit is an event indicator. LBIPEI is set to logic 1
to indicate a line BIP error. The interrupt status bit is independent of the interrupt enable bit.
If WCIMODE is set to logic 1, only over-writing with a ‘1’ clears this bit. If WCIMODE is
set to logic 0, then a read of this register automatically clears the bit.
The line REI error interrupt status (LREIEI) bit is an event indicator. LREIEI is set to logic 1
to indicate a line REI error. The interrupt status bit is independent of the interrupt enable bit.
If WCIMODE is set to logic 1, only over-writing with a ‘1’ clears this bit. If WCIMODE is
set to logic 0, then a read of this register automatically clears the bit.
S/UNI-2488 Telecom Standard Product Datasheet
Released
184

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