PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 188

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
RLAISEN
RLAISINS
K2AIS
The receive line AIS enable (RLAISEN) bit enables line AIS insertion in the outgoing data
stream. When RLAISEN is set to logic 1, line AIS is inserted in the outgoing data stream
when a LOF or LOS condition exists and when the SARC block is configured for this alarm
consequential action. When RLAISEN is set to logic 0, no line AIS is inserted regardless of
the alarm condition.
This bit should be set to logic 1 for normal operation.
The receive line AIS insertion (RLAISIN) bit forces line AIS insertion in the receive SONET
data stream. When RLAISINS is set to logic 1, all ones are inserted in the line overhead
bytes and in the payload bytes (all the bytes of the frame except the section overhead bytes)
to force a line AIS condition. When RLAISINS is set to logic 0, the line AIS condition is
removed.
The K2 line AIS (K2AIS) bit restricts line AIS to the K2 byte. When K2AIS is set to logic 1,
line AIS is only inserted in bits 6, 7 and 8 of the K2 byte. When K2AIS is set to logic 0, line
AIS is inserted in the line overhead bytes and in the payload bytes (all the bytes of the frame
except the section overhead bytes).
S/UNI-2488 Telecom Standard Product Datasheet
Released
188