PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 212

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Register 00A2H: TRMP Aux2 Error Insertion
Register 00C2H: TRMP Aux3 Error Insertion
Register 00E2H: TRMP Aux4 Error Insertion
All reserved bits in this register must be set to their default value for proper operation.
LAISINS
LOSINS
B2DISABLE
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
For normal operation, the LAISINS should be set to the same value as the LAISINS bit in the
TRMP Error Insertion register.
For normal operation, the LOSINS should be set to the same value as the LOSINS bit in the
TRMP Error Insertion register.
The B2 disable insertion (B2DISABLE) bit is used to set the B2 byte in a pass through mode.
When B2DISABLE is set to logic one, the B2 byte value is passed through transparently
without being overwritten. When B2DISABLE is set to logic zero, a valid B2 byte is inserted
into the TOH.
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Unused
Unused
Unused
Unused
Unused
Unused
B2DISABLE
Reserved
LOSINS
LAISINS
Reserved
Reserved
Reserved
Reserved
Reserved
Function
Unused
S/UNI-2488 Telecom Standard Product Datasheet
Default
0
0
0
0
0
0
1
1
1
Released
212