PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 219

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Register 0102H: SBER Interrupt Enable
SDBERE
SFBERE
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
The SDBERE bit is the interrupt enable for the SDBER alarm. When SDBERE set to logic 1,
the pending interrupt in the SBER Interrupt Status register, SDBERI, will assert the interrupt
(INTB) output. When SDBERE is set to logic 0, the pending interrupt will not assert the
interrupt (INTB) output.
The SFBERE bit is the interrupt enable for the SFBER alarm. When SFBERE set to logic 1,
the pending interrupt in the SBER Interrupt Status Register, SFBERI, will assert the interrupt
(INTB) output. When SFBERE is set to logic 0, the pending interrupt will not assert the
interrupt (INTB) output.
Type
R/W
R/W
Function
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
SFBERE
SDBERE
S/UNI-2488 Telecom Standard Product Datasheet
Default
0
0
Released
219