PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 220

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Register 0103H: SBER Interrupt Status
SDBERI
SFBERI
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
The SDBERI bit is an event indicator set to logic 1 to indicate any changes in the status of
SDBERV. This interrupt status bit is independent of the SDBERE interrupt enable bits. If
WCIMODE is set to logic 1, only over-writing with a ‘1’ clears this bit. If WCIMODE is set
to logic 0, then a read of this register automatically clears the bit.
The SFBERI bit is an event indicator set to logic 1 to indicate any changes in the status of
SFBERV. This interrupt status bit is independent of the SFBERE interrupt enable bits. If
WCIMODE is set to logic 1, only over-writing with a ‘1’ clears this bit. If WCIMODE is set
to logic 0, then a read of this register automatically clears the bit.
Type
R
R
Function
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
SFBERI
SDBERI
Default
X
X
S/UNI-2488 Telecom Standard Product Datasheet
Released
220