PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 253

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Indirect Register 01H: RHPP Error Monitor Configuration
The Error Monitor Configuration Indirect Register is provided at RHPP r/w indirect address 01H.
ALGO2
PSL5
PLMEND
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
The payload signal label algorithm 2 (ALGO2) bit selects the algorithm for the PSL
monitoring. When ALGO2 is set to logic 1, the ITU compliant algorithm (algorithm 2) is
used to monitor the PSL. When ALGO2 is set to logic 0, the BELLCORE compliant
algorithm (algorithm 1) is used to monitor the PSL. ALGO2 changes the PLU-P, PLM-P and
PDI-P defect definitions but has no effect on UNEQ-P defect, accepted PSL and change of
PSL definitions
The payload signal label detection (PSL5) bit selects the path PSL persistence. When PSL5
is set to logic 1, a new PSL is accepted when the same PSL value is detected in the C2 byte
for five consecutive frames. When PSL5 is set to logic 0, a new PSL is accepted when the
same PSL value is detected in the C2 byte for three consecutive frames.
The payload label mismatch removal (PLMEND) bit controls the removal of a PLM-P defect
when an UNEQ-P defect is declared. When PLMEND is set to logic 1, a PLM-P defect is
terminated when an UNEQ-P defect is declared. When PLMEND is set to logic 0, a PLM-P
defect is not terminated when an UNEQ-P defect is declared.
R/W
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
Unused
Unused
Unused
Unused
B3EONRPOH
IPREIBLK
IBER
PREIBLKACC
B3EBLK
PBIPECNTBLK
PBIPEBLKACC
FSBIPDIS
PRDI10
PLMEND
PSL5
ALGO2
S/UNI-2488 Telecom Standard Product Datasheet
Default
X
X
X
X
0
0
0
0
0
0
0
0
0
0
0
0
Released
253