PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 255

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PM5381-BI

Manufacturer Part Number
PM5381-BI
Description
ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
Manufacturer
PMC-Sierra, Inc.
Datasheet

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Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
IBER
IPREIBLK
B3EONRPOH
The inband error reporting (IBER) bit controls the inband regeneration of the path status (G1)
byte. When IBER is set to logic 1, the path status byte is updated with the REI-P and the
ERDI-P defects that must be returned to the far end. When IBER is set to logic 0, the path
status byte is not altered.
The inband path REI block errors (IPREIBLK) bit controls the regeneration of the path REI
errors in the path status (G1) byte. When IPREIBLK is set to logic 1, the path REI is updated
with block BIP-8 errors (a maximum of 1 error per frame). When IPREIBLK is set to logic
0, the path REI is updated with BIP-8 errors (a maximum of 8 errors per frame).
The B3E On RPOH (B3EONRPOH) bit controls whether the normal B3E output on RPOH
should be replaced by the BIP-8 error byte. When set to logic 0, B3 is output normally.
When set to logic 1, B3 is replaced by the BIP-8 error code.
S/UNI-2488 Telecom Standard Product Datasheet
Released
255

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