PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 294

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Indirect Register 04H: THPP Fixed Stuff Byte and B3 Mask (TFSB)
FSB[7:0]
B3MASK[7:0]
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
When the FSBEN bit in the THPP Control register is logic one, the THPP replaces the fixed
bytes with the byte from this register. Note that if the channel is unequipped, this field may be
set to the same value that is indicated by UNEQV to insert FSB that is consistent with the rest
of the payload.
FSB[7:0] should be consistent for all THPP STS-1/STM0 #1 through #48.
The calculated B3 parity byte is always XOR’ed with this register bit to allow the user to
insert errors in B3.
B3MASK[7:0] is only valid for THPP STS-1/STM0 #1.
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
B3MASK[7]
B3MASK[6]
B3MASK[5]
B3MASK[4]
B3MASK[3]
B3MASK[2]
B3MASK[1]
B3MASK[0]
FSB[7]
FSB[6]
FSB[5]
FSB[4]
FSB[3]
FSB[2]
FSB[1]
FSB[0]
S/UNI-2488 Telecom Standard Product Datasheet
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Released
294