PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 318

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Diag_LOP
Diag_PAIS
Diag_FifoAISDis
Diag_NDFREQ
PTRDD[1:0]
JUST3DIS
When set high, the Diag_LOP bit forces the SVCA to invert the outgoing NDF field of the
payload (selected path(s)) pointer causing downstream pointer processing elements to enter a
loss of pointer (LOP) state.
When set high, the Diag_PAIS bit forces the SVCA to insert path AIS in the selected
outgoing stream for at least three consecutive frames. AIS is inserted by writing an all ones
pattern in the transport overhead bytes H1, H2, and H3, as well as in the entire STS
synchronous payload envelope. The first frame after PAIS negates will contain a new data
flag in the transport overhead H1 byte.
When set high, the Diag_FifoAISDis bit forces the SVCA not to insert path AIS upon FIFO
overflow/underflow detection. When set low (normal operation), detection of FIFO
overflow/underflow causes path AIS to be inserted in the outgoing stream for at least three
consecutive frames.
Note: When Diag_FifoAISDis is enabled, any overflow or underflow will cause the SVCA to
declare both FUDR and FOVR interrupts.
When set high, the Diag_NDFREQ bit forces the SVCA to insert a NEW DATA FLAG
indication in the frame regardless of the state of the pointer generation state machine. This bit
should be set for less than one frame as multiple NDF will otherwise ensue. Consecutive
NDF will cause the downstream pointer processor to declare LOP.
After any timeslot is reconfigured, the corresponding Diag_NDFREQ bit must be toggled.
The PTRDD[1:0] defines the SS bits for the STS-N/AU-N concatenation pointer (may also be
known as DD). ITU requires that DD be set to 10 when processing AU-4, AU-3 or TU-3.
Note, BELLCORE does not specify these two bits.
When set high, JUST3DIS allows the SVCA to perform 1 justification per frame when
necessary. When set to zero, pointer justifications are allowed only every 4 frames.
S/UNI-2488 Telecom Standard Product Datasheet
Released
318