PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 33
PM5381-BI
Manufacturer Part Number
PM5381-BI
Description
ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
Manufacturer
PMC-Sierra, Inc.
Datasheet
1.PM5381-BI.pdf
(586 pages)
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2.1
2.2
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Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Features
General
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SONET Section and Line / SDH Regenerator and Multiplexer
Section
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Single chip ATM and POS User-Network Interface operating at 2488.32 Mbit/s.
Implements the ATM Forum User Network Interface Specification and the ATM physical
layer for Broadband ISDN according to CCITT Recommendation I.432.
Implements the Point-to-Point Protocol (PPP) over SONET/SDH specification according to
RFC 2615(1619)/1662 of the PPP Working Group of the Internet Engineering Task Force
(IETF).
Processes bit-serial 2488.32 Mbit/s STS-48 (STM-16-16c) data streams with on-chip clock
and data recovery and clock synthesis.
Complies with Bellcore GR-253-CORE jitter tolerance, jitter transfer and RMS intrinsic jitter
criteria.
Provides termination for SONET Section, Line and Path overhead or SDH Regenerator
Section, Multiplexer Section and High Order Path overhead.
Provides UTOPIA Level 3 32-bit wide System Interface (clocked up to 104 MHz) with parity
support for ATM applications.
Provides SATURN POS-PHY Level 3ä 32-bit System Interface (clocked up to 104 MHz) for
Packet over SONET (POS), or ATM applications.
Supports line loopback from the line side receive stream to the transmit stream and diagnostic
loopback from the line side transmit stream to the line side receive stream interface.
Provides support for automatic protection switching via a 4-bit LVDS 777.76 MHz port.
Provides a standard 5 signal IEEE 1149.1 JTAG test port for boundary scan board test
purposes.
Provides a generic 16-bit microprocessor bus interface for configuration, control, and status
monitoring.
Low power 1.8V CMOS core logic with 3.3V CMOS/TTL compatible digital inputs and
digital outputs. PECL inputs and outputs are 3.3V compatible.
Wide operating temperature range (-40°C to +85°C).
416 pin UBGA package.
Frames to the SONET/SDH receive stream and inserts the framing bytes (A1, A2) and the
section trace byte (J0) into the transmit stream; descrambles the received stream and
scrambles the transmit stream.
S/UNI-2488 Telecom Standard Product Datasheet
Released
33
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