PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 333

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Indirect Register C0H to FFH: RTTP PATH Expected Trace
The RTTP PATH Expected Trace Indirect Register is provided at RTTP r/w indirect address C0H
to FFH.
ETRACE[7:0]
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
The expected tail trace message (ETRACE[7:0]) bits contain a static message written by an
external microprocessor. In algorithm 1 the expected message is used to validate the captured
message. In algorithm 2 the expected message is used to validate the accepted message.
When LENGTH16 is set to logic 1, the expected message must be written between address
C0h and CFh. When LENGTH16 is set to logic 0, the accepted message must be written
between address C0h and FFh.
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
ETRACE[7]
ETRACE[6]
ETRACE[5]
ETRACE[4]
ETRACE[3]
ETRACE[2]
ETRACE[1]
ETRACE[0]
S/UNI-2488 Telecom Standard Product Datasheet
Default
X
X
X
X
X
X
X
X
Released
333