PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 36

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

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Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
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The Transmit ATM Processor
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The Transmit POS Processor
Provides a SATURN POS-PHY Level 3™ compliant 32-bit datapath interface (clocked up to
104 MHz) with parity support to read packet data from an internal 192x16-byte FIFO buffer.
Provides idle/unassigned cell insertion.
Optionally provides HCS generation/insertion, and ATM cell payload scrambling.
Counts the number of transmitted cells.
Provides UTOPIA Level 3 and POS-PHY Level 3 32-bit wide datapath interfaces (clocked up
to 104 MHz) with parity support for writing cells into an internal 48 cell FIFO.
Supports any packet based link layer protocol using byte synchronous and bit synchronous
framing like PPP, HDLC and Frame Relay.
Performs self-synchronous POS data scrambling using the 1+X
Encapsulates packets within a POS/HDLC frame.
Performs flag sequence insertion.
Performs byte stuffing for transparency processing.
Optionally performs frame check sequence generation using the CRC-CCITT and CRC-32
polynomials.
Aborts packets under the direction of the host or when the FIFO underflows.
Provides a SATURN® POS-PHY Level 3™ compliant 32-bit wide datapath (clocked up to
104 MHz) with parity support to an internal 192x16-byte FIFO buffer.
S/UNI-2488 Telecom Standard Product Datasheet
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polynomial.
Released
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