PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 373

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Register 074AH: RCFP Packet/Cell Counter (LSB)
Register 074BH: RCFP Receive Packet/ATM Cell Counter (MSB)
RP_RC[31:0]
A write to any one of the RCFP performance monitor Counter registers loads the registers with
the current counter value and resets the internal 32 bit counter to 1 or 0. The counter reset value is
dependent on if there was a count event during the transfer of the count to the RCFP performance
monitor Counter registers. The counter should be polled regularly to avoid saturation.
To allow for synchronization update with all other blocks, writing to register 0000H will initiate a
global performance counter update.
Bit
Bit 15
to
Bit 0
Bit
Bit 15
to
Bit 0
When POS mode is selected, the RP_RC[31:0] bits indicate the number of received good
packets passed to the FIFO interface during the last accumulation interval.
When ATM mode is selected, the RP_RC[31:0] bits indicate the number of received ATM
cells passed to the FIFO interface in the last accumulation interval.
Type
R
Type
R
RP_RC[15:0]
RP_RC[31:16]
Function
Function
S/UNI-2488 Telecom Standard Product Datasheet
Default
XXXX
Default
XXXX
Released
373