PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 406
PM5381-BI
Manufacturer Part Number
PM5381-BI
Description
ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
Manufacturer
PMC-Sierra, Inc.
Datasheet
1.PM5381-BI.pdf
(586 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 406 of 586
- Download datasheet (3Mb)
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Register 0778H: TXSDQ FIFO Indirect Address
This is an indirect register that is used to specify the address of the FIFO for which the user is
setting up or reading the setup. This register is the common address used for the three indirect
setup registers: 0779H FIFO Indirect Configuration, 077AH FIFO Indirect Buffer and 077BH
Data Available Thresholds plus the 077CH FIFO Indirect Cells and Packets Count. See also
section 13.19: Accessing Indirect Registers.
A FIFO needs to be configured according to a set of rules defined in the Operation section. In
order to change the current setup of a FIFO, it is recommended that the user reads the existing
setup information first, makes any modifications as required, and writes back the information.
PHYID[5:0]
EMPTY
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
This field should be set to all zeros.
This read-only indirect-access register bit indicates if the requested FIFO is empty. When
this bit is read as 1, the FIFO number specified in PHYID[5:0] in this register is empty.
Before reconfiguring a disabled FIFO, this bit needs to be sampled at logic 1 indicating that
the FIFO is empty. Note that a read to this register bit must be preceded by a write to this
register with RWB (bit 14) set to logic 1, and the PHYID set to all-zeros. Then the register
may be read and the EMPTY bit checked. See Section 13.19 for the procedure to access
indirect register bits.
R
Type
R/W
W
R
R/W
R/W
R/W
R/W
R/W
R/W
BUSY
RWB
FLUSH
EMPTY
Unused
Unused
PHYID[5]
PHYID[4]
PHYID[3]
PHYID[2]
PHYID[1]
PHYID[0]
Function
Unused
Unused
Unused
Unused
S/UNI-2488 Telecom Standard Product Datasheet
Default
0
0
0
1
X
X
X
X
X
X
0
0
0
0
0
0
Released
406
Related parts for PM5381-BI
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
Saturn user network interface for 2488 Mbit/s
Manufacturer:
PMC-Sierra, Inc.
Part Number:
Description:
2 Megabit (256K x 8) 5.0 Volt-only CMOS Flash Memory
Manufacturer:
PMC-Sierra, Inc.
Part Number:
Description:
Interface, Multi-rate Telecom Backplane SERDES for 2.5Gbit/s Interconnect
Manufacturer:
PMC-Sierra, Inc.
Part Number:
Description:
processor, Spectra-9953 Device Driver
Manufacturer:
PMC-Sierra, Inc.
Part Number:
Description:
Ethernet, 8 Channel 10/100 Ethernet over SONET/SDH Mapping Device
Manufacturer:
PMC-Sierra, Inc.
Part Number:
Description:
Interface, Single Chip ADM for 622 & 155Mbit/s
Manufacturer:
PMC-Sierra, Inc.
Part Number:
Description:
Interface, Single Chip ADM for 622 & 155Mbit/s
Manufacturer:
PMC-Sierra, Inc.
Part Number:
Description:
Interface, Multi-rate SATURN User Network Interface for 2x622 and 4x155
Manufacturer:
PMC-Sierra, Inc.
Part Number:
Description:
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR
Manufacturer:
PMC-Sierra, Inc.
Datasheet:
Part Number:
Description:
Processor, SONET/SDH Tributary Unit Payload Processor for 2488.32Mbit/s
Manufacturer:
PMC-Sierra, Inc.
Part Number:
Description:
HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER AND M13 MULTIPLEXER
Manufacturer:
PMC-Sierra, Inc.
Datasheet:
Part Number:
Description:
SONET/SDH, Single Chip 96 Port SONET/SDH Cross-Connect Switch Element
Manufacturer:
PMC-Sierra, Inc.
Part Number:
Description:
ATM, Sixteen Channel ATM PHY Interface for 155.52 Mbps
Manufacturer:
PMC-Sierra, Inc.
Part Number:
Description:
Interface, 4-Channel ATM and Bit HDLC User Network Interface
Manufacturer:
PMC-Sierra, Inc.
Part Number:
Description:
Communications, Octal T1/E1/J1 Low Latency Transport Line Interface Device
Manufacturer:
PMC-Sierra, Inc.