PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 411
PM5381-BI
Manufacturer Part Number
PM5381-BI
Description
ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
Manufacturer
PMC-Sierra, Inc.
Datasheet
1.PM5381-BI.pdf
(586 pages)
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Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
DT[7:0]
These bits specify the Data Available threshold for the FIFO selected by the TXSDQ FIFO
Indirect Address register PHYID[5:0] bits. When this threshold is being set, these bits are
written to by the user, and when this threshold is being read, these bits hold the previously
configured data. The threshold is equal to DT[7:0] + 1.
This threshold is set in 16 byte Blocks. This threshold can never be greater than the size of
the FIFO being configured, and the absolute maximum value is DT[7:0] +1 = 192. This
number should be a standard fraction of the FIFO size in blocks. In the case of ATM FIFOs,
this number should be set to a value of DT[7:0] = 3 (ATM cells are 4 blocks long).
The DT[7:0] threshold sets the level at which the cell/packet processors (TCFP) blocks can
begin transmission of a cell or packet. Once transmission of a cell or packet begins, it cannot
be stopped so this threshold should be set to a value which guarantees that the Utopia/POS-
PHY interface can write to the FIFO in due time to prevent FIFO underruns. For packet data,
it is recommended that DT[7:0] be set to a larger value about equal to 1/2 or 2/3 the size of
the FIFO.
S/UNI-2488 Telecom Standard Product Datasheet
Released
411
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