PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 444

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Register 080BH: PRGM Monitor Synchronization Status
Register 081BH: PRGM Aux 2 Monitor Synchronization Status
Register 082BH: PRGM Aux 3 Monitor Synchronization Status
Register 083BH: PRGM Aux 4 Monitor Synchronization Status
MONx_SYNCV
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
The Monitor Synchronization Status registers reflects the synchronization state of each STS-1
path.
PRGM Monitor Synchronization Status register, N = 0.
PRGM Aux2 Monitor Synchronization Status register, N = 1.
PRGM Aux3 Monitor Synchronization Status register, N = 2.
PRGM Aux4 Monitor Synchronization Status register, N = 3.
The Monitor Synchronization Status registers reflect the state of the monitor’s state machine.
When MONx_SYNCV is set high, the monitor’s state machine is in synchronization for the
STS-1 Path x. When MONx_SYNCV is low, the monitor is out of sync for the STS-1 Path
x. The Synchronization Status is only valid when the corresponding monitor is enabled.
Note that the PRGM will synchronize on an all zeroes or all ones pattern. To verify that a
valid PRBS pattern is the signal the PRGM is locked to, check the PRBS[22:0] bits in the
PRGM Monitor PRBS Accumulator Page. If the bits are not all zeroes or all ones, then the
synchronization is due to locking on a valid PRBS pattern.
Type
R
R
R
R
R
R
R
R
R
R
R
R
Unused
Unused
Unused
Unused
MON[N+12]_SYNCV
MON[N+11]_SYNCV
MON[N+10]_SYNCV
MON[N+9]_SYNCV
MON[N+8]_SYNCV
MON[N+7]_SYNCV
MON[N+6]_SYNCV
MON[N+5]_SYNCV
MON[N+4]_SYNCV
MON[N+3]_SYNCV
MON[N+2]_SYNCV
MON[N+1]_SYNCV
Function
S/UNI-2488 Telecom Standard Product Datasheet
Default
X
X
X
X
X
X
X
X
X
X
X
X
Released
444