PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 454

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PM5381-BI

Manufacturer Part Number
PM5381-BI
Description
ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
Manufacturer
PMC-Sierra, Inc.
Datasheet

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Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
OCAV
OFAV
OCAE
OFAE
LCVE
FUOE
The out-of-character-alignment status bit (OCAV) reports the state of the character alignment
circuit. OCAV is set high when the receiver is in the out-of-character-alignment state. OCAV
is set low when the receiver is in the in-character-alignment state.
The out-of-frame-alignment status bit (OFAV) reports the state of the frame alignment circuit.
OFAV is set high when the receiver is in the out-of-frame-alignment state. OFAV is set low
when the receiver is in the in-frame-alignment state.
The out-of-character-alignment interrupt enable bit (OCAE) controls the change of character
alignment state interrupts. Interrupts may be generated when the character alignment circuit
changes state to the out-of-character-alignment state or to the in-character-alignment state.
When OCAE is set high, an interrupt is generated when a change of state occurs. Interrupts
due to changes of character alignment state are masked when OCAE is set low.
The out-of-frame-alignment interrupt enable bit (OFAE) controls the change of frame
alignment state interrupts. Interrupts may be generated when the frame alignment block
changes state to the out-of-frame-alignment state or to the in-frame-alignment state. When
OFAE is set high, an interrupt is generated when a change of state occurs. Interrupts due to
changes of frame alignment state are masked when OFAE is set low.
The line code violation interrupt enable bit (LCVE) controls the line code violation event
interrupts. Interrupts may be generated when a line code violation is detected. When LCVE
is set high, an interrupt is generated when an LCV is detected. Interrupts due to LCVs are
masked when LCVE is set low.
The FIFO underrun/overrun status interrupt enable (FUOE) controls the underrun/overrun
event interrupts. Interrupts may be generated when the underrun/overrun event is detected.
When FUOE is set high, an interrupt is generated when a FIFO underrun or overrun condition
is detected. Interrupts due to FIFO underrun of overrun conditions are masked when FUEO
is set low.
S/UNI-2488 Telecom Standard Product Datasheet
Released
454

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