PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 486

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Register 0888H: CSTR Control
Except for the CSU_ENB register bit, the other register bits are used for manufacturing test
purposes only. They are not required for normal operations.
The Reserved bits should be set to their default values for normal operation.
CSU_RSTB
CSU_ENB
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
The CSU_RSTB signal is a software reset signal that forces the APS CSU into a reset. It
should be set to logic 0 to conserve power consumption for applications not using the APS
port.
The active low APS CSU enable control signal (CSU_ENB) bit forces the APS CSU into low
power configuration. The APS CSU is disabled when CSU_ENB is logic 1. The APS CSU is
enabled when CSU_ENB is logic 0. This bit must be set to logic 0 for normal operation
using the APS port. It should be set to logic 1 to conserve power consumption for
applications not using the APS port.
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
CSU_ENB
CSU_RSTB
Unused
Unused
Reserved
S/UNI-2488 Telecom Standard Product Datasheet
Default
0
0
0
0
0
1
0
0
0
0
0
0
1
1
Released
486