PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 487

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Register 0889H: CSTR Interrupt Enable and APS CSU Lock Status
CSU_LOCKE
CSU_LOCKV
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 1
Bit 1
Bit 0
The APS CSU lock interrupt enable bit (CSU_LOCKE) enables the assertion of a hardware
interrupt on INTB when the APS CSU lock status changes. When CSU_LOCKE is logic 1,
the hardware interrupt is enabled. When CSU_LOCKE is logic 0, the hardware interrupt is
disabled.
The APS CSU lock status (CSU_LOCKV) indicates the current state of the APS CSU. When
CSU_LOCKV is logic 1, the APS CSU has locked on to the APSIFPCLK reference and is
operating normally. When CSU_LOCKV is logic 0, the CSU has not locked onto the
APSIFPCLK reference and is not in normal operating mode.
Type
R
R/W
Unused
Unused
Unused
Unused
Unused
Unused
Unused
CSU_LOCKV
CSU_LOCKE
Function
Unused
Unused
Unused
Unused
Unused
Unused
Unused
S/UNI-2488 Telecom Standard Product Datasheet
Default
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
Released
487