PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 548

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

13.24 Interfacing to ECL or PECL Devices
13.25 Output Levels
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
The S/UNI-2488 is targeting for CML compatible input and output level characteristics. The
S/UNI-2488 generates outputs which are approximately 2/3 100k ECL/PECL swing levels, but
are compatible with the requirements of most Optical Modules as shown in Table 28. Figure 33
shows DC ECL/PECL output levels and their limits. We see that output levels are referenced to a
positive power supply, VDD (VDD=0V for ECL and is typically 2.5V, 3.3V or 5V for PECL).
Therefore, regardless of the value of VDD, the typical value of VOH is required to be 952.5 mV
below VDD and the typical value of VOL is required to be an additional 762.5 mV below that.
Figure 33 PECL Levels (100K Characteristics)
There are no hard specifications for CML, but the signal swing is typically about half that of the
ECL/PECL levels (»800mVppd
size, amount of current and the positive voltage supply). The lower pulse amplitudes lead to
lower crosstalk, EMI and noise transients. Thus each device that claims CML compatibly must be
looked at carefully to insure interoperability with other devices.
2
peak).
Vppd: Peak-to-peak differential voltage (typically equals 2 x single-ended peak-to-
1025mV
1620mV
1810mV
880mV
VDD -
VDD -
VDD -
VDD -
VDD -
1810mV
2
- the signal swing and common mode depend on the resistor
1475mV
VDD -
Input Voltage(V
Input Voltage(V
V
V
V
V
S/UNI-2488 Telecom Standard Product Datasheet
OH
OL
OH
OL
(max)
(m ax)
(m in)
(min)
IN
IN
)
)
VDD -
1165mV
880m V
VDD -
Released
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