PM4328-PI PMC-Sierra, Inc., PM4328-PI Datasheet - Page 160

• Manufacturer Part Number: PM4328-PI
• Description: Framer, T1|E1|T3 Standard Format, 324-BGA
• Manufacturer: PMC-Sierra, Inc.

STANDARD PRODUCT
DATASHEET
PMC-2011596
PROPRIETARY AND CONFIDENTIAL
DATA
FE
INT
LA
Figure 33: Typical Data Frame
Bit 1 is the first serial bit to be received. When enabled, the primary, secondary
and universal addresses are compared with the high order packet address to
determine a match.
Figure 34: Example Multi-Packet Operational Sequence
Figure 34 shows the timing of interrupts, the state of the FIFO, and the state of
the Data Link relative the input data sequence. The cause of each interrupt and
F
F
1
F
BIT:
D
D
D
8
0
0
D
F
2
7
1
1
D
F
A
D
INT
FE
LA
ISSUE 1
D
Address (high)
Frame Check
6
1
1
D
CONTROL
Sequence
D
D
- flag sequence (01111110)
- abort sequence (01111111)
- packet data bytes
- active high interrupt output
- internal FIFO empty status
- state of the LINK ACTIVE software flag
5
1
1
D D D D D
(low)
4
1
1
3
3
1
1
A
147
2
1
1
F
4 5
F
1
0
0
F
F
FLAG
FLAG
D
D
D
data bytes received
and transferred to
the FIFO Buffer
D
F F
6
7
HIGH DENSITY T1/E1 FRAMER
AND M13 MULTIPLEXER
PM4328 TECT3