PM4328-PI PMC-Sierra, Inc., PM4328-PI Datasheet - Page 193

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PM4328-PI

Manufacturer Part Number
PM4328-PI
Description
Framer, T1|E1|T3 Standard Format, 324-BGA
Manufacturer
PMC-Sierra, Inc.
Datasheet

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STANDARD PRODUCT
DATASHEET
PMC-2011596
PROPRIETARY AND CONFIDENTIAL
STCTEST
The single transport chain instruction is used to test out the TAP controller and
the boundary scan register during production test. When this instruction is the
current instruction, the boundary scan register is connected between TDI and
TDO. During the Capture-DR state, the device identification code is loaded into
the boundary scan register. The code can then be shifted out of the output,
TDO, using the Shift-DR state.
Boundary Scan Cells
In the following diagrams, CLOCK-DR is equal to TCK when the current
controller state is SHIFT-DR or CAPTURE-DR, and unchanging otherwise. The
multiplexer in the center of the diagram selects one of four inputs, depending on
the status of select lines G1 and G2. The ID Code bit is as listed in the Boundary
Scan Register table in the JTAG Test Port section 11.2.
Figure 44: Input Observation Cell (IN_CELL)
I.D. Code bit
CLOCK-DR
SHIFT-DR
IDCODE
Input
Pad
Scan Chain In
ISSUE 1
1 2
1 2
1 2
1 2
G1
G2
MUX
180
D
C
Scan Chain Out
HIGH DENSITY T1/E1 FRAMER
to internal
AND M13 MULTIPLEXER
INPUT
logic
PM4328 TECT3

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