PM4328-PI PMC-Sierra, Inc., PM4328-PI Datasheet - Page 244
PM4328-PI
Manufacturer Part Number
PM4328-PI
Description
Framer, T1|E1|T3 Standard Format, 324-BGA
Manufacturer
PMC-Sierra, Inc.
Datasheet
1.PM4328-PI.pdf
(250 pages)
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STANDARD PRODUCT
DATASHEET
PMC-2011596
PROPRIETARY AND CONFIDENTIAL
5. XCLK frequency must be 24x the line rate ±32 ppm when TJAT is free-
6. CTCLK can be a jittered clock signal subject to the minimum high and low
7. When a set-up time is specified between an input and a clock, the set-up
8. When a hold time is specified between an input and a clock, the hold time is
9. Setup, hold, and propagation delay specifications are shown relative to the
10. Output propagation delay time is the time in nanoseconds from the 1.4 Volt
11. Output propagation delays are measured with a 50 pF load on all outputs with
running or referenced to a derivative of XCLK. XCLK may be ± 100 ppm if an
accurate reference is provided to TJAT.
durations tHCTCLK, tLCTCLK. These durations correspond to nominal
XCLK input frequency.
time is the time in nanoseconds from the 1.4 Volt point of the input to the 1.4
Volt point of the clock.
the time in nanoseconds from the 1.4 Volt point of the clock to the 1.4 Volt
point of the input.
default active clock edge, but are equally valid when the opposite edge is
selected as the active edge.
point of the reference signal to the 1.4 Volt point of the output.
the exception of the high speed DS3 outputs (TCLK, TPOS/TDAT,
TNEG/TMFP). The TCLK, TPOS/TDAT, TNEG/TMFP output propagation
delays are measured with a 20 pF load.
ISSUE 1
231
HIGH DENSITY T1/E1 FRAMER
AND M13 MULTIPLEXER
PM4328 TECT3
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