PM4328-PI PMC-Sierra, Inc., PM4328-PI Datasheet - Page 61

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PM4328-PI

Manufacturer Part Number
PM4328-PI
Description
Framer, T1|E1|T3 Standard Format, 324-BGA
Manufacturer
PMC-Sierra, Inc.
Datasheet

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STANDARD PRODUCT
DATASHEET
PMC-2011596
Pin Name
D[0]
D[1]
D[2]
D[3]
D[4]
D[5]
D[6]
D[7]
A[0]
A[1]
A[2]
A[3]
A[4]
A[5]
A[6]
A[7]
A[8]
A[9]
A[10]
A[11]
A[12]
A[13]
RSTB
ALE
JTAG Interface
TCK
PROPRIETARY AND CONFIDENTIAL
Type
I/O
Input
Input
Input
Input
ISSUE 1
Pin
No.
C14
B14
A14
D14
C13
B13
A13
D13
A17
C16
D18
D19
B17
A18
A19
A20
C18
B19
B20
A21
C19
B21
A22 Active Low Reset (RSTB). This signal provides an
D17 Address Latch Enable (ALE). This signal is active
C3
Function
Bidirectional Data Bus (D[7:0]). This bus provides
TECT3 register read and write accesses.
Address Bus (A[13:0]). This bus selects specific
registers during TECT3 register accesses.
Signal A[13] selects between normal mode and test
mode register access. A[13] has an integral pull down
resistor.
asynchronous TECT3 reset. RSTB is a Schmitt
triggered input with an integral pull up resistor.
high and latches the address bus A[13:0] when low.
When ALE is high, the internal address latches are
transparent. It allows the TECT3 to interface to a
multiplexed address/data bus. The ALE input has an
integral pull up resistor.
Test Clock (TCK). This signal provides timing for test
operations that can be carried out using the IEEE
P1149.1 test access port.
48
HIGH DENSITY T1/E1 FRAMER
AND M13 MULTIPLEXER
PM4328 TECT3

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