PM4328-PI PMC-Sierra, Inc., PM4328-PI Datasheet - Page 85

• Manufacturer Part Number: PM4328-PI
• Description: Framer, T1|E1|T3 Standard Format, 324-BGA
• Manufacturer: PMC-Sierra, Inc.

STANDARD PRODUCT
DATASHEET
PMC-2011596
PROPRIETARY AND CONFIDENTIAL
where Fin is the input reference clock frequency and Fout is the output jitter
attenuated clock frequency. The values on N1 and N2 can range between 1 and
256. Fin ranges from 8KHz to 2.048MHz in 8KHz increments.
If the FIFO read pointer comes within one bit of the write pointer, DJAT will track
the jitter of the input clock. This permits the phase jitter to pass through
unattenuated, inhibiting the loss of data.
Jitter Characteristics
Each DJAT Block provides excellent jitter tolerance and jitter attenuation while
generating minimal residual jitter. In T1 mode each DJAT can accommodate up
to 28 UIpp of input jitter at jitter frequencies above 6 Hz. For jitter frequencies
below 6 Hz, more correctly called wander, the tolerance increases 20 dB per
decade. In E1 mode each DJAT can accommodate up to 35 UIpp of input jitter at
jitter frequencies above 9 Hz. For jitter frequencies below 9 Hz, more correctly
called wander, the tolerance increases 20 dB per decade. In most applications
the each DJAT Block will limit jitter tolerance at lower jitter frequencies only. For
high frequency jitter, above 10 kHz for example, other factors such as clock and
data recovery circuitry may limit jitter tolerance and must be considered. For low
frequency wander, below 10 Hz for example, other factors such as slip buffer
hysteresis may limit wander tolerance and must be considered. The DJAT
blocks meet the stringent low frequency jitter tolerance requirements of AT&T TR
62411, ITU-T Recommendation G.823 and thus allow compliance with this
standard and the other less stringent jitter tolerance standards cited in the
references.
The DJAT exhibits negligible jitter gain for jitter frequencies below 6.6 Hz, and
attenuates jitter at frequencies above 6.6 Hz by 20 dB per decade in T1 mode. It
exhibits negligible jitter gain for jitter frequencies below 8.8 Hz, and attenuates
jitter at frequencies above 8.8 Hz by 20 dB per decade in E1 mode. In most
applications the DJAT Blocks will determine jitter attenuation for higher jitter
frequencies only. Wander, below 10 Hz for example, will essentially be passed
unattenuated through DJAT. Jitter, above 10 Hz for example, will be attenuated
as specified, however, outgoing jitter may be dominated by the generated
residual jitter in cases where incoming jitter is insignificant. This generated
residual jitter is directly related to the use of 24X (37.056 MHz or 49.152 MHz)
digital phase locked loop for transmit clock generation. DJAT meets the jitter
transfer requirements of AT&T TR 62411. The DJAT allows the implied T1 jitter
attenuation requirements for a TE or NT1 given in ANSI Standard T1.408, and
the implied jitter attenuation requirements for a type II customer interface given in
ANSI T1.403 to be met. The DJAT meets the E1 jitter attenuation requirements
of the ITU-T Recommendations G.737, G.738, G.739 and G.742.
ISSUE 1
72
HIGH DENSITY T1/E1 FRAMER
AND M13 MULTIPLEXER
PM4328 TECT3