S1M8662A Samsung Semiconductor, Inc., S1M8662A Datasheet

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S1M8662A

Manufacturer Part Number
S1M8662A
Description
Cdma/pcs/gps Triple Mode If/ Baseband Ic
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
RX IF/BBA WITH GPS
INTRODUCTION
S1M8662A is CDMA/PCS/GPS Triple Mode IF/ baseband IC which is
divided into three main parts - IF frequency processing, basband
processing , and digital interface. The receiver IC (S1M8662A)and
transmitter IC (S1M8657) are provided as a KIT.
S1M8662A is a receiver IC, installed with a Rx AGC, Baseband
Converter, Baseband analog filter, and A-D Converter. It can send a
digital baseband signal to the digital baseband IC.
frequency BICMOS processing and can achieve superior high frequency
and low power digital operations.
Its operating voltage is 2.7 to 3.3V, and operating temperature
FEATURES
ORDERING INFORMATION
++ : Under Development
S1M8662A is fabricated on the Samsung's 0.5um high-speed, high
-30 to +85 C .
++ S1M8662AX01-F0T0
Operating Voltage : 2.7 to 3.3V
32BCC++(5mm * 5mm * 0.8mm) Package
Cellular CDMA/PCS/GPS Triple Mode
AGC input signal range : 90dB
QPSK Baseband Converter
Built-in I ,Q Baseband signal extractor LPF
Built-in 4-bit ADC for converting I and Q CDMA analog baseband signals to digital baseband signals
Built-in VCO for baseband conversion
Built-in Modem PDM control circuit to compensate the I and Q offsets
Built-in TCXO output ON/OFF
3-Line Serial Port Interface (SPI)
Device
32-BCC++-5.0 5.0
Package
Operating Temperature
-30 to +85 C
32-BCC++-5.0 5.0
S1M8662A (Preliminary)
1

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S1M8662A Summary of contents

Page 1

... IF frequency processing, basband processing , and digital interface. The receiver IC (S1M8662A)and transmitter IC (S1M8657) are provided as a KIT. S1M8662A is a receiver IC, installed with a Rx AGC, Baseband Converter, Baseband analog filter, and A-D Converter. It can send a digital baseband signal to the digital baseband IC. ...

Page 2

... S1M8662A (Preliminary) BLOCK DIAGRAM RXVCO_T1 VCO RXVCO_T2 CRX_IF1 CRX_IF2 RAGC_CONT GRX_IF1 GRX_IF2 2 RXVCO_OUT1,2 CDMA LPF GPS LPF 0 Div. N N=2,3,4 CDMA LPF GPS LPF RX IF/BBA WITH GPS I_OFS CLOCK SPI DATA Control STROBE 4-Bit RXID[0] - [3] ADC TCXO_out X1 Offset TCXO_in Control CHIPX8 4-Bit ...

Page 3

... RX IF/BBA WITH GPS PIN CONFIGURATION RXQD[1] RXQD[0] VDDM RXID[3] RXID[2] RXID[1] RXID[ S1M8662A 29 (Top View GND SLUG 1 S1M8662A (Preliminary VDDA 15 RXVCO_T2 14 RXVCO_T1 13 I_OFS 12 Q_OFS 11 VDDA 10 VDDA 9 3 ...

Page 4

... Power input terminal for the analog circuit. AI Control DC input for removing the DC offset generated in the S1M8662A and system during CDMA and GPS Mode. The control DC is generated in the modem in PDM form, passes through the R-C filter and is converted to DC, which is sent to this input terminal. ...

Page 5

... VDDM 29 RXQD3 DO 30 RXQD2 31 RXQD1 32 RXQD0 Table 1. S1M8660A and S1M8662A Function & Control Content Comparison Function / Mode Control Operation Modes CDMA (Cellular CDMA, PCS) AMPS (FM) Global Positioning System (GPS) IF AGC 90dB Range CDMA (Cellular CDMA, PCS) AMPS (FM) Global Positioning System (GPS) ...

Page 6

... S1M8662A (Preliminary) ABSOLUTE MAXIMUM RATINGS Characteristic Power supply Storage temperature Operating temperature Storage temperature Electrostatic discharge rating RECOMMENDED OPERATING CONDITIONS Characteristic Power supply Ambient operating temperature ELECTRICAL CHARACTERISTICS Electrical Characteristics(V CC Characteristic Current consumption Current consumption Current consumption Current consumption Logic high input ...

Page 7

... One in-band signal(@50kHz,0.5*F/S) and two jammers(@900kHz, 22dB*F/S and @1.7MHz, 21dB*F/S)are simultaneously input. AGC control voltage is controlled so that ADC output is F/S when the input signal is -80dBm. Test Conditions S1M8662A (Preliminary) Symbol Min Typ Max VCSEN -102 - ...

Page 8

... S1M8662A (Preliminary) AC Characteristics (Continued) Characteristic Single-tone Overall gain reduction due to one jammer. jammer desense The in-band signal at -97dBm (control the AGC control voltage to 0.5*F/S)and the jammer signal at 900kHz and -57dBm are simultaneously input. Residual Sideband RSB Linear Gain Mismatch : Phase Mismatch in Deg. ...

Page 9

... RSB k : Linear Gain Mismatch : Phase Mismatch in Deg. Gain flatness Amount of gain change along I and Q paths between 1kHz to 800kHz Test Conditions cos 20 log cos S1M8662A (Preliminary) Symbol Min Typ Max VCSEN -102 - - VCMAX - - -12 GSLOPE GVAR - Fin ...

Page 10

... S1M8662A (Preliminary) TIMING DIAGRAMS 101.7ns (9.8304MHz) 50.9 +10ns Valid Data 122.2ns (8.184MHz) 61.1ns Valid Data 50ns over SPI_STB SPI_STROBE Setup Time SPI_CLK SPI_DATA 10 50.9 +10ns 15ns over Valid Data 20ns over Figure 1. CDMA Receive ADC Timing 61.1ns 15ns over Valid Data 20ns over Figure 2 ...

Page 11

... C. CDMA Receive Signal Path The receive circuit of S1M8662A has the Rx AGC, an automatic gain controller, and baseband LPF and output terminal with the A-D converter, and VCO and mixer etc. The input signal is received as a differential signal, which is modulated to 1.23 MHz spread-spectrum for CDMA. The mid-frequency is 220.38MHz for Korea-PCS, 1.23MHz for US-PCS, and 85.38MHz for cellular ...

Page 12

... In S1M8656A and S1M8660A, the output of TCXO is divided and 4 and then clocked out. But in S1M8662A the output of TCXO is just amplified and clocked out. So, there is no SPI control which controls the division ratio of TCXO clock. In this product, the TCXO_in pin can input both TCXO signal (TCXO_sig) and TCXO control (TCXO_cont) at the same time ...

Page 13

... IF frequency is 250MHz. Serial Port Interface(SPI) S1M8662A is equipped with the Serial I/F. All internal functions can be controlled through a common bus using an external controller. S1M8662A is designed to be completely compatible with MSM series of Qualcomm. Here, the modem is the master and S1M8662A the slave. ...

Page 14

... S1M8662A (Preliminary) STB CLK DATA Start bit Master drive mode=01 Slave Address Dummy 1=Master read (1) The first 2-BITs are for transmission only and this product must send '01'.(Others are not permitted.) (2) The following 6-bit data specifies the slave device, which is connected to the SPI bus and has its own ID. ...

Page 15

... RX IF/BBA WITH GPS Modes of Operation S1M8662A can be controlled by the SPI bus. Table 2 shows the various modes. Table 2. Mode control in the DC control mode Mode 0x03[1:0] BLOCK_CTL Sleep 00 CDMA idle(Rx GPS idle(Rx CDMA Sot 10 GPS Slot 10 0x06[7] 0x052:0] VCO_CTL FILTER_SEL X XXX ...

Page 16

... R/W RESET 0x00 SPI_ID 0x01 BLOCK_CTL 0x03 R/W FILTER_SEL. 0x05 R/W VCO_CTL 0x06 R MODEM is recorded in the S1M8662A register R : When S1M8662A sends data to the modem Address Name Type 00(h) RESET 01(h) SPI_ID 16 Table 3. S1M8660A Control Registers Default vale W - Reset. Reset S1M8662A and all the register values are returned to their default value ...

Page 17

... RX IF/BBA WITH GPS Table 4. Description Of Control Registers (Continued) Address Name 03(h) Block_CTL 05(h) FILT_SEL 06(h) VCO Type Bits [7] Identifies the S1M8662A Default = 1 [6] Default = 0, Reserved Registers R/W [5: Divider, Default = [3] Default = 1, Reserved Registers [2] RXVCO_OUT2. Default = Singled Ended Output (RXVCO_OUT1 Active, ...

Page 18

... S1M8662A (Preliminary) CHARACTERISTIC GRAPH +1.5 +0.5 -1.5 -4.0 -46.0 -48 0.2 Figure 8. GPS Rx Gain/Phase Mismatch Specification 18 1K 750K 800K 1.1M Frequency [Hz] Figure 7. GPS Rx Low Pass Filter Mask Region of Acceptable Mismatch Performance 0.4 0.6 0.8 Gain Mismatch [dB] RX IF/BBA WITH GPS 1.3M 1.7M 1.0 1.2 1.4 ...

Page 19

... RX IF/BBA WITH GPS CHARACTERISTIC GRAPH (Continued) -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 10 Figure 9. S1M8662A IF VCO Open Loop Phase Noise 100 1K 10K Frequency offset(Hz) S1M8662A (Preliminary) 100K 1M 19 ...

Page 20

... S1M8662A (Preliminary) CHARACTERISTIC GRAPH (Continued) 100 -105 -100 -95 -90 -85 -80 -75 Figure 10. GPS Rx Mode Noise Figure Specification 0 -10 Region of Acceptable IIP3 Performance -20 -30 -40 -50 -60 -105 -100 -95 -90 20 -70 -65 -60 -55 -50 IF Input Power [dBm] -85 -80 -75 -70 -65 -60 -55 -50 IF Input Power [dBm] Figure 11 ...

Page 21

... S1M8662A 12 11 GND SLUG VDDA 2.3nH 2.3nH Vcont Vif Figure 12. Test Circuit S1M8662A (Preliminary) 10nF VDDA 47pF 10K 10K 47pF 10K 1nF VIOffset VQOffset VDDA 10nF VDDA 10nF TCXO_out SPI_STB : Serial Interface Strobe SPI_CLK : Serial Interface Clock ...

Page 22

... S1M8662A (Preliminary) PACKAGE DIMENSION 32BCC+ Package Outline #25 #1 Index Laser Mark #1 0. 5.00 + 0.10 #17 #9 0.50 + 0.1 0.40 0.45 + 0.1 5.0 + 0.1 RX IF/BBA WITH GPS 0.075 + 0.025 0.80 MAX + 0.1 0.45 + 0.1 ...

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