S1M8821 Samsung Semiconductor, Inc., S1M8821 Datasheet
S1M8821
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S1M8821 Summary of contents
Page 1
... Using a proprietary digital phase-locked-loop technique, the S1M8821/22/23 has linear phase detector characteristic and can be used for very stable, low noise local oscillator signal. Supply voltage can range from 2.7V to 4.0V. The S1M8821/22/23 is now available in a 20-TSSOP/24-QFN package. FEATURES • High operating frequency dual synthesizer — ...
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... S1M8821/22/23 ORDERING INFORMATION Device S1M8821X01-R0T0 20-TSSOP-BD44 S1M8822X01-R0T0 S1M8823X01-R0T0 S1M8821X01-R0T0 24-QFN-3.5 4.5 S1M8822X01-R0T0 S1M8823X01-R0T0 2 Package Operating Temperature -40 to +85 C -40 to +85 C INTERGER RF/IF DUAL PLL ...
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... RF Reference GND 9 foLD 10 NOTE: The pin numbers above are for 20-TSSOP package. foLD RF Data Out LD Multiplexer RF RF Programmable Programmable Counter 20-bit Shift Register Counter S1M8821/22/ Phase Charge Detector Pump IF Prescaler – Prescaler Control Counter IF N-Latch 2-bit Control IF R-Latch ...
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... Vp is the source of digital noises. The power for analog part is supplied by VDD and VDD are tied together, noisy Vp corrupts the power source for the analog part Vp1 2 CPoRF 3 GND 4 (Digital) S1M8821 finRF 5 S1M8822 finRF 6 S1M8823 GND 7 (Analog) OSCin 8 GND 9 ...
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... N CPoIF 19 GND (Digital) S1M8821 18 finIF S1M8822 17 finIF S1M8823 16 GND (Analog DATA N foLD CLOCK GND (Digital) 24-QFN 24 PIN Quad Flat Non-leaded (24-QFN) Package S1M8821/22/23 * N/C pins must be connected to GND(to Analog GND if possible and V are tied together, DD ...
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... S1M8821/22/23 PIN DESCRIPTION Pin No Pin No Symbol (20TSSOP) (24QFN Vp1 3 3 CPoRF 4 4 GND 5 5 finRF 6 6 finRF 7 7 GND 8 8 OSCin - GND oLD 11 12 CLOCK - DATA GND Power supply voltage input for the RF PLL part. V equal V 2 ...
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... No connection. - Power supply voltage input for IF charge pump Power supply voltage input for the IF PLL part. V equal order to reject supply noise, bypass capacitors DD must be placed as close as possible to this pin and be connected directly to the ground plane. S1M8821/22/23 Description must DD 7 ...
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... S1M8821/22/23 EQUIVALENT CIRCUIT DIAGRAM CLOCK, DATA, LE OSCin finRF, finRF, finIF, finIF finRF, finIF 8 foLD CPoRF, CPoIF V bias INTERGER RF/IF DUAL PLL finRF, finIF ...
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... These devices are ESD sensitive. These devices must be handled in the ESD protected environment. Symbol Value 4 600 D Ta -40 to +85 T -65 to +150 STG Pin No. ESD level All 2000 All 300 All 800 S1M8821/22/23 Unit Unit ...
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... Characteristic Power Supply Voltage S1M8823 S1M8823 RF Only S1M8822 Power Supply S1M8822 RF Only Current S1M8821 S1M8821 RF Only S1M882x IF Only Power down Current Digital inputs : CLOCK, DATA and LE High-Level Input Voltage Low-Level Input Voltage High-Level Input Current Low-Level Input Current ...
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... 0. -0. finRF V =2.7V to 4.0V DD finIF V =3. =3. fin V =4. =2.7V to 4.0V fin OSCin V OSCin S1M8821/22/23 Min. Typ. Max. Unit -1.0 +1.0 mA -4.0 +4.0 -2.5 +2 0.5 2.5 0.2 2.0 GHz 0.1 1.2 45 520 MHz -15 0 dBm -10 0 -10 0 dBm 10 MHz 5 40 MHz 0.5 V ...
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... S1M8821/22/23 ELECTRICAL CHARACTERISTICS (Continued) (V =3.0V, V =3.0V Unless otherwise specified ) DD P Characteristic Serial Data Control CLOCK Frequency CLOCK Pulse Width High CLOCK Pulse Width Low DATA Set Up Time to CLOCK Risng Edge DATA Hold Time after CLOCK Rising Edge LE Pulse Width CLOCK Rising Edge to LE Rising Edge < ...
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... INTERGER RF/IF DUAL PLL FUNCTIONAL DESCRIPTION The Samsung S1M8821/22/23 are dual PLL frequency synthesizer ICs. S1M8821/22/23 combined with external LPFs and external VCOs form PLL frequency synthesizers. They include serial data control, R counter, N counter, prescaler, phase detector, charge pump, and etc. Serial data is moved into 20-bit shift register on the rising edge of the clock. These data enters MSB first. When LE becomes HIGH, data in the shift register is moved into one of the 4 latches(by the 2-bit control) ...
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... S1M8821/22/23 PROGRAMMING DESCRIPTION Control Bits Control Bits Programmable Reference Counter( Counter) If the Control Bits are 00(IF) or 01(RF), data is moved from the 20-bit shift register into the R-latch which sets the reference counter. Serial data format is shown in the table below. LSB ...
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... Ratio( Division ratio : S1M8821/22/23 MSB Program Modes ...
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... VCO OSCin f : External VCO output frequency VCO P : Preset modulus of dual modulus prescaler (for S1M8821/22 RF:P=64 or 128 11-bit main counter division ratio ( 7-bit swallow counter division ratio (for RF 127, for IF External reference frequency(from external oscillator) OSCin ...
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... RF and IF Lock Detect Reference Divider Output Reference Divider Output Programmable Divider Output Programmable Divider Output 1 1 High Speed Lock mode Counter Reset Counter Reset and IF Counter Reset S1M8821/22/23 VCO Characteristics (2) VCO Input Voltage foLD Output State 17 ...
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... Powerdown mode operation There are synchronous and asynchronous powerdown modes for S1M8821/22/23. Synchronous powerdown mode occurs if R18 bit is LOW, N20 bit is HIGH and charge pump output is in high impedance state. In the synchronous power down mode, the powerdown function is activated by the charge pump to diminish unwanted frequency jumps ...
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... RF SENSITIVITY MEASUREMENT CIRCUIT 50 Microstrip RF Signal 10dB ATTN Generator 51 12k Frequency Counter 39k ** N=10,000 R=50 P=64 ** Sensitivity limit is determined when the error of the divided RF output( foLD) becomes 1 Hz. 100pF 100pF in OSC in foLD S1M8821/22/23 2. 2.2 F 100pF 100pF LE PC DATA Parallel CLOCK Port 2 ...
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... The role of Rin : Rin makes VCO output power go to the load rather than the PLL. The value of Rin depends on the VCO power level. 20 VCO 100pF R1 RF out 10pF C2 C1 100pF GND finRF f RF GND in S1M8821/22/23 GND GND 100pF 100pF 10pF VCO R2 C3 INTERGER RF/IF DUAL PLL ...
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... PACKAGE DIMENSIONS #20 #11 #1 #10 6.90 0.272 MAX 6.40 ¡¾ 0.20 0.252 ¡¾ 0.008 0.30 0.65 0.012 0.026 0.22 ¡¾ 0.10 0.009 ¡¾ 0.004 4.40 ¡¾ 0.20 0.173 ¡¾ 0.008 5.72 0.225 0.50 ¡¾ 0.20 0.020 ¡¾ 0.008 0.10MAX 0.004MAX 20-Lead TSSOP Package (Samsung 20-TSSOP-BD44) S1M8821/22/23 21 ...
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... S1M8821/22/23 PACKAGE DIMENSIONS (24-QFN 0. INDEX AREA 3.50 + 0.10 4X0.50 + 0.10 (0.05) #24 20X0.50 24X0.30 + 0.05 2X1.00 C 0.10 INTERGER RF/IF DUAL PLL 1.00MAX 0.27 + 0.05 0. MARK 2X 0. ...