S1M8837 Samsung Semiconductor, Inc., S1M8837 Datasheet

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S1M8837

Manufacturer Part Number
S1M8837
Description
Fractional-n Rf/integer-n If Dual Pll
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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FRACTIONAL-N RF/INTEGER-N IF DUAL PLL
INTRODUCTION
The S1M8836/37 is a Fractional-N frequency synthesizer with integrated
prescalers, designed for RF operation up to 1.0GHz/2.5GHz and for IF
operation up to 520MHz. The fractional-N synthesizer allows fast-locking, low
phase noise phase-locked loops to be built easily, thus having rapid channel
switching and reducing standby time for extended battery life. The S1M8836/37
based on
other fractional-N synthesizers based on charge pump compensation. The
synthesizer also has an additional feature that the PCS/CDMA channel
frequency in steps of 10kHz can be accurately programmed.
The S1M8836/37 contains quadruple-modulus prescalers. The S1M8836 RF
synthesizer adopts an 8/9/12/13 prescaler(16/17/20/21 for the S1M8837) and the IF synthesizer adopts an 8/9
prescaler. Phase detector gain is user-programmable for maximum flexibility to address IS-95 CDMA and
IMT2000. Various program-controlled power down options as well as low supply voltage help the design of
wireless cell phones having minimum power consumption.
Using the Samsung's proprietary digital phase-locked-loop technique, the S1M8836/37 has a linear phase
detector characteristic and can be used for very stable, low noise PLL's. Supply voltage can range from 2.7V to
4.0V. The S1M8836/37 is available in a 24-QFN package.
FEATURES
High operating frequency dual synthesizer
Operating voltage range : 2.7 to 4.0V
Low current consumption(S1M8836: 5.5mA, S1M8837: 7.5mA)
Selectable power saving mode (Icc = 1uA typical @3V)
Quadruple-modulus prescaler and Fractional-N/Integer-N:
S1M8836: 250MHz to 1.0GHz(RF) / 45MHz to 520MHz(IF)
S1M8837: 500MHz to 2.5GHz(RF) / 45MHz to 520MHz(IF)
Excellent in-band phase noise ( – 85dBc/Hz @ PCS, – 90dBc/Hz @ CDMA)
Improved fractional spurious performance ( < 80dBc )
Frequency resolution (= 10kHz/64 @ f
Fast channel switching time: <500us
Programmable charge pump output current: from 50 A to 800 A in 50 A steps
Programmability via on-chip serial bus interface
S1M8836
S1M8837
S1M8836/37
-
fractional-N techniques solves the fractional spur problems in
(IF) 8/9
(RF) 8/9/12/13
(RF) 16/17/20/21
ref
= 9.84MHz)
Fractional-N
Fractional-N
Integer-N
24-QFN-3.5 4.5
S1M8836/37
1

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S1M8837 Summary of contents

Page 1

... The S1M8836/37 contains quadruple-modulus prescalers. The S1M8836 RF synthesizer adopts an 8/9/12/13 prescaler(16/17/20/21 for the S1M8837) and the IF synthesizer adopts an 8/9 prescaler. Phase detector gain is user-programmable for maximum flexibility to address IS-95 CDMA and IMT2000. Various program-controlled power down options as well as low supply voltage help the design of wireless cell phones having minimum power consumption ...

Page 2

... S1M8836/37 APPLICATIONS High-rate data-service cellular telephones (for CDMA) : S1M8836, S1M8837 High-rate data-service portable wireless communications : S1M8837 Other wireless communications systems ORDERING INFORMATION Device + S1M8836X01-G0T0 + S1M8837X01-G0T0 +: New Product 2 FRACTIONAL-N RF/INTEGER-N IF DUAL PLL Package Operating Temperature 24-QFN-3.5 4.5 -40 to +85C ...

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FRACTIONAL-N RF/INTEGER-N IF DUAL PLL BLOCK DIAGRAM Charge Phase Pump Detector Prescaler 4 DGND + - Prescaler Control ...

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S1M8836/37 PIN DIAGRAM DGND GND RFa 8 DD OSCin 9 4 FRACTIONAL-N RF/INTEGER-N IF DUAL PLL ...

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FRACTIONAL-N RF/INTEGER-N IF DUAL PLL PIN DESCRIPTION Pin No. Symbol I PLL power supply (2.7V to 4.0V). Must be equal – VpRF – Power supply for RF charge pump. Must be 3 ...

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FRACTIONAL-N RF/INTEGER-N IF DUAL PLL EQUIVALENT CIRCUIT DIAGRAM CLOCK, DATA, LE OSCin f RF RF, f RF bias S1M8836/37 foLD CP RF ...

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FRACTIONAL-N RF/INTEGER-N IF DUAL PLL ABSOLUTE MAXIMUM RATINGS Characteristics Power supply voltage Voltage on any pin with GND = 0 volts Power dissipation Operating temperature Storage temperature ELECTROSTATIC CHARACTERISTICS Characteristics Human Body Model Machine Model Charge Device Model NOTE: These ...

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... Characteristic Power supply voltage Power supply S1M8836 RF+IF current S1M8837 RF+IF S1M8836 RF+IF S1M8837 RF+IF IF only Power down current Digital Inputs: CLOCK, DATA and LE High Level Input Voltage Low Level Input Voltage High Level Input Current Low Level Input Current Reference Oscillator Input: OSC Input Current ...

Page 9

... IF Charge Pump Output Current Charge Pump Leakage Current Sink vs. Source Mismatch Output Current Magnitude Variations. Voltage Output Current vs. Temperature Operating Frequency, Input Sensitivity (Programmable Divider, PFD) RF Operating S1M8837 Frequency S1M8836 IF Operating Frequency Reference Oscillator Input Frequency Phase Detector Operating Frequency RF Input Sensitivity ...

Page 10

S1M8836/37 ELECTRICAL CHARACTERISTICS (Continued) (V =3.0V, V =3.0V unless otherwise specified Characteristic Serial Data Control CLOCK Frequency CLOCK Pulse Width High CLOCK Pulse Width Low DATA Set Up Time to CLOCK Rising Edge ...

Page 11

... ECL switching level to drive the following ECL divider so that it can be normally operated even in a smaller input power less than -10dBm. The amplified VCO output signal is divided by the prescaler with a pre- determined divide ratio (div. 8/9/12/13 for S1M8836, div. 16/17/20/21 for S1M8837, div. 8/9 for IF), the N counter and the Fractional-N circuitry( comparison frequency of the PFD ...

Page 12

... The other input pin fin of the buffer also needs external capacitor for decoupling the DC component and controlling the input power level. The RF prescalers of S1M8836 and S1M8837 provide 8/9/12/13 and 16/17/20/21 prescaler ratio, respectively. The IF prescaler of S1M8836/37 contains 8/9 dual modulus prescaler. Reference Oscillator Inputs The reference oscillator frequency is provided by an external reference such as TCXO through the OSC It drives both the IF R and RF R counters ...

Page 13

FRACTIONAL-N RF/INTEGER-N IF DUAL PLL - modulator The RF part of S1M8836/37 adopts the to obtain divide ratio fractional number between two contiguous integers. The effectively randomizes the quantization noise generated from digitizing process and results ...

Page 14

S1M8836/37 Programming Description The S1M8836/37 can be programmed via the serial bus interface. The interface is made of 3 functional signals: clock, data, and latch enable(LE). Serial data is moved into the 22-bit shift register on the rising edge of ...

Page 15

FRACTIONAL-N RF/INTEGER-N IF DUAL PLL Data Bit Map (DATA[21:2]) (Continued) Control Words Control bits IF_CTL_WORD W1[21] W1[20] W1[19] CMOS W2[21] W2[20] W2[19] IF_CP_WORD W2[18] W2[17] foLD W3[21:18] RF_CP_WORD W3[17:14] W3[13] RF_CTL_WORD W4[21] W4[20] W4[19] — Counter Reset mode resets R ...

Page 16

S1M8836/37 Programmable Reference Counter(W1[18:2]) If the Control Bit is 00, data is moved from the 22-bit shift register into the R-latch which sets the IF reference counter. Serial data format is shown in the table below. MSB IF_CTL_WORD[21:19 ...

Page 17

... If the Control Bits are 01(IF), 10, and 11(RF), data is transferred from the 22-bit shift register into the N/Frac- latch. N Counter consists of swallow counter(A counter; 3-bit for IF & S1M8836RF and 4-bit for S1M8837RF), main counter(B counter; 7-bit for S1M8836/37 RF and 12-bit for IF), and fractional counter(F counter; 17-bit for S1M8836/37 RF) ...

Page 18

... Division ratio : 3 to 127 (The division ratios less than 3 are prohibited) RF Swallow Counter Division Ratio (A Counter) RF_NA_CNTR[5:2] ; for S1M8836 Division Ratio( Division Ratio : Don't care condition RF_NA_CNTR[5:2] ; for S1M8837 Division Ratio( NOTE: Division Ratio Don't care condition 18 W3[21:0] ...

Page 19

FRACTIONAL-N RF/INTEGER-N IF DUAL PLL RF Fractional Counter MSB RF_CTL_WORD[21:19] 21 Program Code RF Fractional Counter Value (F Counter) FRAC_ CNTR[18:2] ; for S1M8836/37 RF Counter Value ( 31488 ...

Page 20

S1M8836/37 Programmable PFD and Charge Pump IF Charge Pump Gain ( IF_CP_WORD; W2[18] ) Control Words Control bits IF_CP_WORD W2[18] RF Charge Pump Gain ( RF_CP_WORD; W3[17:14] ) Control Words Control bits RF_CP_WORD W3[17:14] Icpo ( A) W3[17] 50 100 ...

Page 21

FRACTIONAL-N RF/INTEGER-N IF DUAL PLL Program Mode Control Power down mode operation Control Words Control bits IF_CTL_WORD W1[20] W1[19] RF_CTL_WORD W4[20] Each PLL is individually power controlled by the enable pins (RF_EN and IF_EN pins) or program control bits (PWDN, ...

Page 22

S1M8836/37 IF Power down mode table W1[20 Programmable Counter Reset Control Control Words Control bits IF_CTL_WORD W1[21] RF_CTL_WORD W4[21] Counter Reset mode resets R & N counters. RF Fractional-N selection Control Words Control bits RF_CTL_WORD W4[19] ...

Page 23

FRACTIONAL-N RF/INTEGER-N IF DUAL PLL foLD Control Control Words Control bits foLD W3[21:18] foLD[3] foLD[ When ...

Page 24

... VCO : External VCO output frequency f OSC : External reference frequency(From external oscillator) R: Preset divide ratio of programmable R counter (RF 3(typically 2), IF 32767); P: Preset modulus of quadruple modulus prescaler (S1M8836 RF:P=8, S1M8837 RF:P=16, IF:P=8) B: Preset value of main counter (S1M8836/37 RF 127, IF 4095) A: Preset value of swallow counter division ratio ...

Page 25

FRACTIONAL-N RF/INTEGER-N IF DUAL PLL Serial Data Input Timing MSB DATA DATA[21] CLOCK LE LE Phase Detector and Charge Pump Characteristics Phase difference detection Range : -2 When the positive-slope polarity of PFD is selected, W2[17]=HIGH or W3[13]=HIGH ...

Page 26

... Frequency Counter Sensitivity limit is determined when the error of the divided RF output (foLD) becomes 10Hz. = 1.0GHz 100 S1M8836 Integer-N test mode f VCO f = 2.1GHz 210 16 S1M8837 Integer-N test mode Typical Application Example VCO 26 50 Microstrip 100pF 100pF ...

Page 27

FRACTIONAL-N RF/INTEGER-N IF DUAL PLL TYPICAL APPLICATION CIRCUIT V DD 100pF 0. 0 Out Reference 1000pF Input OSC V RFa DD in foLD 10 foLD RF_EN 12 IF_EN CLCOK DATA ...

Page 28

FRACTIONAL-N RF/INTEGER-N IF DUAL PLL PCB LAYOUT GUIDE In doing PCB layouts for S1M8836/37, we recommend that you apply the following design guide to your handsets, thus improving the phase noise and reference spurious performances of the phones. 1. The ...

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FRACTIONAL-N RF/INTEGER-N IF DUAL PLL PACKAGE DIMENSIONS A 2X 0.10 #1 INDEX AREA 3.50 + 0.10 4X0.50 + 0.10 (0.05) #24 20X0.50 24X0.30 + 0.05 2X1.00 C 0.10 1.00MAX 0.27 + 0.05 0. ...

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