WM8608 ETC-unknow, WM8608 Datasheet
WM8608
Related parts for WM8608
WM8608 Summary of contents
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... A Synchroniser allows slaving to LRCLK, thus making the WM8608 independent of source MCLK frequency and jitter. The device is controlled via a 2/3 wire serial interface. The interface provides access to all features including channel selection, volume controls, mutes, de-emphasis and power management facilities ...
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... WM8608 DESCRIPTION .......................................................................................................1 FEATURES.............................................................................................................1 APPLICATIONS .....................................................................................................1 TABLE OF CONTENTS .........................................................................................2 PIN CONFIGURATION...........................................................................................4 ORDERING INFORMATION ..................................................................................4 ABSOLUTE MAXIMUM RATINGS.........................................................................6 ELECTRICAL CHARACTERISTICS ......................................................................7 TERMINOLOGY .....................................................................................................8 POWER CONSUMPTION ......................................................................................8 SIGNAL TIMING REQUIREMENTS .......................................................................9 POWER SUPPLY.......................................................................................................... 9 MASTER CLOCK TIMING ............................................................................................. 9 AUDIO INTERFACE TIMING – MASTER MODE ........................................................ 10 AUDIO INTERFACE TIMING – SLAVE MODE............................................................ 11 CONTROL INTERFACE TIMING – 3-WIRE MODE .................................................... 12 CONTROL INTERFACE TIMING – ...
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... Product Preview APPLICATION NOTES ........................................................................................50 START-UP .................................................................................................................. 50 POWER SUPPLY CONNECTIONS............................................................................. 51 APPLICATIONS INFORMATION .........................................................................52 RECOMMENDED EXTERNAL COMPONENTS .......................................................... 52 RECOMMENDED EXTERNAL COMPONENTS VALUES ........................................... 52 PACKAGE DIMENSIONS ....................................................................................53 IMPORTANT NOTICE ..........................................................................................54 ADDRESS: .................................................................................................................. 54 w WM8608 PP Rev 1.5 March 2004 3 ...
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... PWMCLKP 44 TEST 45 TEST 46 AVDD 47 AGND ORDERING INFORMATION DEVICE TEMP RANGE WM8608EFT/V - WM8608EFT/RV - WM8608SEFT/V - WM8608SEFT/RV - Note: Reel quantity = 2,200 BVDD 23 OPRCP 22 OPRCN BGND 21 20 OPSWP 19 OPSWN BVDD 18 17 ...
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... PWM output buffer ground supply PWM output negative Front left channel PWM output positive Front left channel PWM output buffer positive supply Supply PWM Clock negative PWM Clock positive Do Not Connect Do Not Connect Analogue positive supply Analogue negative supply WM8608 DESCRIPTION PP Rev 1.5 March 2004 5 ...
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... WM8608 ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics at the test conditions specified. ESD Sensitive Device. This device is manufactured on a CMOS process therefore generically susceptible to damage from excessive static voltages ...
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... FL, FR, FC, SL, SR, RC FL, FR, FC, SL, SR, RC FL, FR, FC, SL, SR, RC FL, FR, FC, SL, SR, RC FL, FR, FC, SL, SR, RC FL, FR, FC, SL, SR, RC FL, FR, FC, SL, SR Subwoofer 5 Subwoofer 5 Subwoofer 5 Subwoofer 5 Subwoofer 5 Subwoofer 5 Subwoofer 5 Subwoofer WM8608 44.1kHz/48kHz, MCLK = 256fs unless MIN TYP MAX 3 4 ±0.1 ±0.5 0 0.44 0.77 AVDD 4 5 0.10 0.11 0.13 0.1 0.4 0.5 1.2 1 ...
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... WM8608 Test Conditions AVDD, BVDD, DVDD = 2.7 to 3.3V, AGND, DGND, BGND = 0V, T stated. PARAMETER PWM buffer drive strength PWM pulse repetition rate Notes: 1. Ratio of output level with 1kHz full scale input, to the output level with all zeros into the digital input, measured ‘A’ ...
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... MCLK Duty cycle MCLK Period Jitter MCLK Rise/Fall times 10% to 90% AVDD Table 3 Master Clock Timing Requirements w ° C SYMBOL MCLKY ° SYMBOL t MCLKY WM8608 MIN TYP MAX 0.2 50 0.2 50 0.2 50 MIN TYP MAX 20 100 40:60 60:40 200 3 PP Rev 1.5 March 2004 UNIT ms ms ...
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... WM8608 AUDIO INTERFACE TIMING – MASTER MODE BCLK (Output) LRCLK (Output) DINFRONT DINSRND DINC_LFE DINREAR Figure 2 Digital Audio Data Timing – Master Mode (see Control Interface) Test Conditions AVDD, DVDD, BVDD = 3.3V, AGND, DGND, BGDN = 0V, T unless otherwise stated. PARAMETER Audio Data Input Timing Information ...
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... Note: BCLK period should always be greater than or equal to MCLK period BCH BCL t BCY LRH +25 C, Slave Mode 48kHz, MCLK = 256fs, 24-bit data, A SYMBOL t BCY t BCH t BCL t LRSU t LRH t DH WM8608 t LRSU MIN TYP MAX UNIT Rev 1.5 March 2004 11 ...
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... WM8608 CONTROL INTERFACE TIMING – 3-WIRE MODE CSB SCLK SDIN Figure 4 Control Interface Timing – 3-Wire Serial Control Mode Test Conditions AVDD, DVDD, BVDD = 3.3V, AGND, DGND, BGND = 0V, T unless otherwise stated. PARAMETER Program Register Input Information SCLK rising edge to CSB rising edge ...
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... C, Slave Mode 48kHz, MCLK = 256fs, 24-bit data, A SYMBOL WM8608 MIN TYP MAX 400 600 1.3 600 600 100 300 300 600 900 Rev 1.5 March 2004 UNIT kHz ...
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... WM8608 PWM OUTPUT TIMING OPXXX Figure 6 PWM Output Timing Test Conditions AVDD, DVDD, BVDD = 2.7 to 3.3V, AGND, DGND, BGND = 0V, T 24-bit data, unless otherwise stated. PARAMETER Program Register Input Information PWM Frequency PWM Low Pulse-Width PWM High Pulse-Width LVDS Mode 1 PWM Rise Time ...
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... Reference Designs for complete PWM digital power amplifiers, providing high-performance low-cost solutions ideal for Surround Sound AV Processors and DVD Receivers. The WM8608 has a configurable input processor which accepts either Stereo, 5.1, 6.1 or 7.1 channels of PCM audio and outputs Stereo, 2.1, 5.1 or 6.1 outputs. This is done by mixing rear channel data into centre rear or surround output channels, as required ...
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... Master and Salve Mode Operation, below). MASTER AND SLAVE MODE OPERATION The WM8608 can be configured as either a master or slave mode device master device the WM8608 generates BCLK and LRCLK and thus controls sequencing of the data transfer on the data channels ...
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... Figure 10 Right Justified Mode Timing Diagram modes, the minimum number of BCLKs per DACLRC period is 2 LEFT CHANNEL n-2 n-1 MSB LSB LEFT CHANNEL n-2 n-1 MSB LSB WM8608 1/fs RIGHT CHANNEL n-2 n-1 MSB LSB 1/fs RIGHT CHANNEL n-2 n-1 MSB PP Rev 1.5 March 2004 ...
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... WM8608 MODE mode, the MSB is sampled on the second rising edge of BCLK following a LRCLK transition. LRCLK is low during the left samples and high during the right samples. LRCLK BCLK DINFRONT DINSRND DINC_LFE DINREAR Figure 11 I DSP MODE A AND B In DSP mode, the Front Left (FL) channel MSB is available on either the 1 A) rising edge of BCLK (selectable by LRP) following a rising edge of LRCLK ...
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... RL = Surround-Left Surround-Right Surround-Centre, LFE = Low Frequency Effects w INPUT FORMAT (ORDER) FL, FR FL, FR, SL, SR, FC, LFE FL, FR, SL, SR, FC, LFE, RC FL, FR, SL, SR, FC, LFE, RL, RR WM8608 SUPPORTED MODES Restrictions apply for audio sample rates (fs) of 176.4 and 192kHz, e. MCLK/192; maximal input word length = 24 bits 192kHz, MCLK = 27 MHz; ...
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... WM8608 AUDIO INTERFACE CONTROL The register bits controlling audio format, word length and master/slave mode are summarised below. MS selects audio interface operation in master or slave mode. In Master mode BCLK and LRCLK are outputs and the frequency of LRCLK is set by the sample rate control bits SR[3:0]. In Slave mode BCLK and LRCLK are inputs (refer to Table 12 for sample rate control in this case) ...
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... Product Preview MASTER CLOCK AND AUDIO SAMPLE RATES The WM8608 supports a wide range of master clock frequencies on the MCLK pin, and can generate many commonly used audio sample rates directly from the master clock. (See Table 14 for details.) REGISTER ADDRESS R0 (00h) Clocking Table 12 Clocking and Sample Rate Control (1) If the WM8608 is running in MPEG mode (i ...
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... WM8608 CLKDIV2=0 [MHz] 12.288 24.576 11.2896 22.5792 18.432 36.864 16.9344 33.8688 27.000 Table 14 Master Clock and Sample Rates The following Figure 14, Figure 15, Figure 16 and Figure 17 illustrate the different Clocking and Audio IF modes. Figure 14 Clock and Audio IF: Clock Master / Audio IF Slave (default) ...
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... Product Preview Figure 15 Clock and Audio IF: Clock Master / Audio IF Master Figure 16 Clock and Audio IF: Clock Slave / Audio IF Slave Figure 17 Clock and Audio IF: Clock Slave / Audio IF Master w WM8608 PP Rev 1.5 March 2004 23 ...
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... WM8608 SYNCHRONISER The WM8608 contains a synchroniser circuit to support the synchronisation of an external LRCLK to the local LRCLK. This mode is only supported in MPEG mode. The specification of the synchroniser circuit is: Test Conditions AVDD, DVDD, BVDD = 3.3V, AGND, DGND, BGND = 0V, T unless otherwise stated. PARAMETER Lock time ...
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... MSB first). If the device address received matches the address of the WM8608 and the R/W bit is ‘0’, indicating a write, then the WM8608 responds by pulling SDIN low on the next clock pulse (ACK). If the address is not recognised or the R/W bit is ‘1’, the WM8608 returns to the idle condition and wait for a new start condition and valid address. ...
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... Figure 18 2-Wire Serial Control Interface The WM8608 has two possible device addresses, which can be selected using the CSB pin. Table 20 2-Wire MPU Interface Address Selection INPUT PROCESSOR The WM8608 supports the production of 2.1, 5.1 and 6.1 outputs from stereo, 5.1, 6.1 and 7.1 inputs according to Table 21 and Table 22. CONFIG Stereo 5 ...
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... SUB SL Figure 19 Loudspeaker Configuration for 6.1 Output The WM8608 also supports Stereo input – Stereo output via the Bass Management filtering options, as discussed in Bass Management (page 29). In this case, the output configuration is set to 2.1. Where there are a different number of input and output channels, the data is processed as follows. ...
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... WM8608 STEREO INPUT – STEREO OUTPUT The Front-Left and Front-Right inputs are passed to the Front-Left and Front-Right Outputs. All other channels are muted. STEREO INPUT – 2.1 OUTPUT The Front-Left and Front-Right inputs are passed to the Front-Left and Front-Right Outputs. The low- frequency contents of the Front inputs, may be optionally mixed and passed to the SUB output ...
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... The filters are designed so that the cut-off frequencies for the high-pass and low-pass filters remain constant irrespective of the sampling frequency used. 1 low-pass and high-pass filters. LFE SR Figure 20 Bass Management +10dB WM8608 st order filters are used for the SUB Rev 1.5 March 2004 29 ...
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... WM8608 The high-pass filters pairs can be bypassed to allow full-range speakers to be used on any of the 3 main output channel pairs. The low-pass outputs from the Front channels can also be disabled to provide Stereo In – Stereo Out capability when full range front speakers are used. ...
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... Product Preview GRAPHIC EQUALISER The WM8608 has a 4-band Graphic Equaliser on the front three channels. The three upper bands are controlled via registers (see Table 26, Table 27, Table 28 and Table 29). The lowest band is controlled via the subwoofer volume control (see VOLS in Table 32). The function has selectable cut- off frequencies which are independent of sample rate ...
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... WM8608 REGISTER ADDRESS R18 (12h) EQ Centre- Frequency Control Table 29 EQ Frequency Control Band 0 is controlled via the sub-woofer volume control register R11 as described in Table 32. The functionality to add/subtract the boost/cut setting to the sub-woofer volume must be written into the software controller for the chip. ...
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... VOLFR [7:0] 10110001 (-15dB) 8 UPDATE 0 7:0 VOLSL [7:0] 10110001 (-15dB) 8 UPDATE 0 WM8608 DESCRIPTION De-emphasis Control De-emphasis 1 = De-emphasis enabled DESCRIPTION Front-Left Volume in 0.5dB steps. Refer to Table 14 Volume Update 0 = Store FLVOL in intermediate latch (no gain change Store and Update all channel gains Front-Right Volume in 0.5dB steps. ...
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... WM8608 REGISTER ADDRESS R7 (07h) Surround- Right Volume R8 (08h) Front-Centre Volume R9 (09h) Rear-Centre Volume R10 (0Ah) Subwoofer Volume Table 32 Volume Control Table 33 Volume Control Levels w BIT LABEL DEFAULT 7:0 VOLSR [7:0] 10110001 (-15dB) 8 UPDATE 0 7:0 VOLFC [7:0] 10110001 (-15dB) 8 UPDATE 0 7:0 VOLRC [7:0] 10110001 (-15dB) 8 UPDATE 0 7:0 VOLS [7:0] 10110001 ...
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... BIT LABEL DEFAULT 0 DVCF 0 1 DVCS 0 2 DVCC 0 WM8608 DESCRIPTION Dual Volume Control – Front Channels Use VOLFR setting for Front- Right channel 1: Apply VOLFL setting to Front- Right channel Dual Volume Control – Surround Channels Use VOLSR setting for Surround-Right channel ...
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... WM8608 SOFT MUTE AND AUTO-MUTE The WM8608 has a Soft Mute function set by the SMUTE control bit. Figure 21 shows the application and release of SMUTE while a full amplitude sinusoid is being played at 48kHz sampling rate. When SMUTE (lower trace) is asserted, the output (upper trace) begins to decay exponentially from the DC level of the last input sample ...
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... Table 35 Mute DYNAMIC PEAK COMPRESSOR The WM8608 includes a Dynamic Peak Compressor for each channel, which prevents the occurrence of digital clipping when gains in excess of 0dB are applied. The compressor automatically adjusts the signal amplitude to allow headroom for the LFE boost, sub-woofer mixing, tone controls, loudspeaker equalisation and digital volume control ...
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... WM8608 ATTACK AND DECAY TIMES The attack time-constant ATK controls how fast the gain is reduced when the signal goes above the threshold defined as the time taken for the gain to reduce by 6dB. Normally a short attack time- constant is used to prevent the signal clipping when a high-amplitude transient occurs. ...
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... THRESH[1: FDEP 0 BIT LABEL DEFAULT 0 PLENSUB 1 WM8608 DESCRIPTION Front, Surround, Front Centre and Rear Centre Channel Attack Rate 000 = 170µs 001 = 330µs 010 = 670µs 011 = 1.33ms 100 = 2.67ms 101 = 5.33ms 110 = 10.7ms 111 = 20.1ms Front, Surround, Front Centre and ...
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... WM8608 REGISTER ADDRESS R24 (18h) Sub Channel Dynamic Peak Compressor Table 39 Subwoofer Channel Dynamic Peak Compressor (2) w BIT LABEL DEFAULT 2:0 ATK[2:0] 010 5:3 DCY[2:0] 011 7:6 THRESH[1: FDEP 0 Product Preview DESCRIPTION Sub Channel Attack Rate 000 = 170µs 001 = 330µs 010 = 670µs 011 = 1 ...
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... Control Zero- Cross Table 40 Volume Control Zero-Cross INTERPOLATION FILTERS The WM8608 uses two types of interpolation filters, selected according to sampling frequency, as shown in Table 40. SAMPLING FREQUENCY Table 41 Interpolation Filter Types Note: If the Subwoofer channel is redirected into the Rear Centre (RC) channel the main channel characteristics apply ...
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... WM8608 FILTER TYPE 1 PARAMETER Filter Passband Stopband Passband ripple Stopband Attenuation Group Delay Table 43 Digital Filter 1 Characteristics The subwoofer filter characteristic is defined in Table 44 FILTER TYPE SUBWOOFER PARAMETER Sample Rate 32k 44k1 48k 88k2 96k 176k 192k Table 44 Subwoofer Filter Characteristic Note: * indicates no interpolation filters ...
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... Main Channel SUB [kHz] [kHz] 384 192 352.8 176.4 384 192 352.8 176.4 384 192 352.8 176.4 384 192 ) is generated by the built-in PLL of the WM8608 OBCLK BIT LABEL DEFAULT 6:0 PH[6:0] 0000000 WM8608 MINIMUM PULSE WIDTH (T PWMM ) OBCLK [MHz] [ns] 98.304 122 90.3168 133 98 ...
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... R27 (1Bh) PWM Output Configuration Table 47 PWM Output Configuration OUTPUT CONFIGURATION If required the WM8608 device can be disabled in a system by setting the TRI bit as defined in Table 48. Setting the TRI bit will set all output pins of the device to high impedance. REGISTER ADDRESS R28 (1Ch) ...
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... OPDISR 0 2 MENA 1 STATE DESCRIPTION 1 The device is operating correctly 0 The outputs are disabled or the WM8608 device is in (default) Standby (default) mode WM8608 DESCRIPTION Standby select Normal Mode 1: Standby Mode Output disable register 0: Normal mode 1: PWM output disabled OPDIS Mode 0 : Synchronous 1: Latched, reset via Control I/F PP Rev 1 ...
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... I.e. to reset the OPDIS register write 1 to bit 0 of the Reset register and them write 0 to bit 0. EXTERNAL POWER SUPPLY CLOCK The WM8608 device can generate a clock signal for an external PSU (Power Supply Unit) which is available at the CLKPSU pin. CLKPSU ...
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... DCYPSU HOLD GMAX WM8608 BIT[3] BIT[2] BIT[1] BIT[0] DEFAULT CLKDIV2 MEDGE MPEG CMAST 0_0000_0011 SR 0_0001_0000 WL FORMAT 0_0000_1010 RCCFG IPCFG 0_0001_1001 0_1011_0001 0_1011_0001 0_1011_0001 0_1011_0001 0_1011_0001 0_1011_0001 0_1011_0001 0 DVCC DVCS ...
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... WM8608 DIGITAL FILTER CHARACTERISTICS FILTER RESPONSES 10 0 -10 -20 -30 -40 -50 -60 -70 -80 0 0.5 1 1.5 Frequency (Fs) Figure 25 Digital Filter Frequency Response – 32kHz 10 0 -10 -20 -30 -40 -50 -60 -70 -80 0 0.5 1 1.5 Frequency (Fs) Figure 27 Digital Filter Frequency Response – 44.1, 48 and 96kHz 10 0 -10 -20 -30 -40 -50 -60 -70 -80 0 0.2 0.4 0.6 Frequency (Fs) Figure 29 Digital Filter Frequency Response – ...
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... Figure 34 De-Emphasis Error (44.1kHz 15000 20000 0 Figure 36 De-Emphasis Error (48kHz) WM8608 4000 6000 8000 10000 12000 14000 16000 Frequency (Hz) 5000 10000 15000 20000 Frequency (Hz) 5000 10000 15000 20000 Frequency (Hz) PP Rev 1.5 March 2004 ...
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... APPLICATION NOTES START-UP The WM8608 per default is switched off and the PWM output pins are static high, to protect any external circuit. When the device has been properly initialized and the output configuration has been defined then the device can safely be switched on. A typical start-up sequence is show in Figure 37. ...
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... Product Preview POWER SUPPLY CONNECTIONS The WM8608 has got 3 individual power supplies. Figure 38 shows how these power supplies are connected and used on the chip and package. w WM8608 PP Rev 1.5 March 2004 51 ...
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... WM8608 Figure 38 WM8608 Power Supply Connections APPLICATIONS INFORMATION RECOMMENDED EXTERNAL COMPONENTS Figure 39 WM8608 External Component Diagram RECOMMENDED EXTERNAL COMPONENTS VALUES COMPONENT REFERENCE Y1 C1 C4-C10 Table 54 External Components Description w SUGGESTED VALUE DESCRIPTION 24.576 / 27.000MHz Crystal (15pF load, 500µW) 22pF Capacitor NP0 0603 4.7µ ...
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... C. BODY DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSION, NOT TO EXCEED 0.25MM. D. MEETS JEDEC.95 MS-026, VARIATION = ABC. REFER TO THIS SPECIFICATION FOR FURTHER DETAILS -C- ccc C SEATING PLANE Dimensions (mm) NOM MAX ----- 1.20 ----- 0.15 1.00 1.05 0.22 0.27 ----- 0.20 9.00 BSC 7.00 BSC 9.00 BSC 7.00 BSC 0.50 BSC 0.60 0. 3.5 7 0.08 WM8608 DM004 Rev 1.5 March 2004 53 ...
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... WM8608 IMPORTANT NOTICE Wolfson Microelectronics plc (WM) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current. All products are sold subject to the WM terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability ...