ADT7475 Analog Devices, Inc., ADT7475 Datasheet
ADT7475
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ADT7475 Summary of contents
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... The ADT7475 dBCool® controller is a thermal monitor and multiple PWM fan controller for noise-sensitive or power- sensitive applications requiring active system cooling. The ADT7475 can drive a fan using either a low or high frequency drive signal, monitor the temperature two remote sensor diodes plus its own internal temperature, and measure and control the speed four fans so that they operate at the lowest possible speed for minimum acoustic noise ...
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... Timing Diagram ........................................................................... 4 Absolute Maximum Ratings............................................................ 5 Thermal Resistance ...................................................................... 5 ESD Caution.................................................................................. 5 Pin Configuration and Function Descriptions............................. 6 Typical Performance Characteristics ............................................. 7 Product Description......................................................................... 9 Quick Comparison Between ADT7473 and ADT7475 .......... 9 Recommended Implementation................................................. 9 Serial Bus Interface......................................................................... 10 Write Operations ........................................................................ 11 Read Operations ......................................................................... 12 SMBus Timeout .......................................................................... 12 Virus Protection.......................................................................... 12 Voltage Measurement Input...................................................... 12 Analog-to-Digital Converter ...
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... V 0.1 20 μA 0.4 V 0.1 1.0 μA 2.0 V 0.4 V 500 mV Rev Page ADT7475 Test Conditions/Comments Interface inactive, ADC active 0°C ≤ T ≤ 85°C A −40°C ≤ T ≤ +125°C A 0°C ≤ T ≤ 85°C A −40°C ≤ T ≤ +125°C A High level Low level 8 bits ...
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... ADT7475 Parameter DIGITAL INPUT LOGIC LEVELS (TACH INPUTS) Input High Voltage Input Low Voltage Hysteresis DIGITAL INPUT LOGIC LEVELS (THERM) ADTL+ Input High Voltage Input Low Voltage DIGITAL INPUT CURRENT Input High Current Input Low Current, I ...
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... V to +3.6 V ±5 mA Table 3. Thermal Resistance ±20 mA Package Type 150°C 16-lead QSOP package −65°C to +150°C ESD CAUTION 260°C 300°C 1500 V Rev Page ADT7475 θ θ Unit JA JC 150 39 °C/W ...
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... XTO Also functions as the output from the XNOR tree in XNOR test mode. 16 SDA Digital I/O (Open Drain). SMBus bidirectional serial data. Requires 10 kΩ typical pull-up. SCL SDA 1 16 GND PWM1/XTO 2 15 ADT7475 CCP TOP VIEW TACH3 D1 (Not to Scale) D1– ...
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... NOISE FREQUENCY (Hz) 1.20 1.18 1.16 1.14 1.12 1.10 1.08 1.06 1.04 1.02 1.00 0.98 3.0 3.1 3.2 3.3 3.4 V (V) DD Figure 8. Normal I vs. Power Supply 100mV 0 250mV –5 –10 –15 0 100M 200M 300M 400M FREQUENCY (Hz) Figure 9. Internal Temperature Error vs. Power Supply Noise ADT7475 500M 600M 3.5 3.6 500M 600M ...
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... OIL BATH TEMPERATURE (°C) Figure 11. Internal Temperature Error vs. ADT7475 Temperature 400M 500M 600M 85 105 125 Rev Page 3.0 2.5 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 –40 – OIL BATH TEMPERATURE (°C) Figure 12. Remote Temperature Error vs. ADT7475 Temperature 105 125 ...
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... The ADT7475 has two additional configuration registers. • The ADT7475 has other minor register changes. The ADT7475 is similar to the ADT7473 in that it is powered by a supply no greater than 3.6 V. Exceeding this specification results in irreversible damage to the ADT7475. Signal pins (TACH/PWM) should be pulled up or clamped to 3.6 V maximum ...
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... ICH. The ADT7475 has a fixed 7-bit serial bus address of 0101110 or 0x2E. The read/write bit must be added to get the 8-bit address (01011100 or 0x5C). Data is sent over the serial bus in sequences of nine clock pulses, that is, eight bits of data followed by an acknowledge bit from the slave device ...
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... The master asserts a stop condition on SDA and the transaction ends. For the ADT7475, the send byte protocol is used to write a register address to RAM for a subsequent single-byte read from the same address. This operation is shown in Figure 17. Figure 17. Setting a Register Address for a Subsequent Read ...
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... Bit 6 TODIS = 1; SMBus timeout disabled. VIRUS PROTECTION To prevent rogue programs or viruses from accessing critical 5 6 ADT7475 register settings, the lock bit can be set. Setting Bit 1 of Configuration Register 1 (0x40) sets the lock bit and locks A P critical registers. In this mode, certain registers can no longer be written to until the ADT7475 is powered down and powered up again ...
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... Setting Bit 6 of Configuration Register 2 (0x73) places the ADT7475 into single-channel ADC conversion mode. In this mode, the ADT7475 can be made to read a single voltage chan- nel only. If the internal ADT7475 clock is used, the selected input is read every 711 μs. The appropriate ADC channel is selected by writing to Bits [7:5] of the TACH1 minimum high byte register (0x55) ...
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... ADT7475 Table 6. 10-Bit ADC Output Code vs. V Input Voltage CCP <0.0042 <0.00293 0.0042 to 0.0085 0.0293 to 0.0058 0.0085 to 0.0128 0.0058 to 0.0087 0.0128 to 0.0171 0.0087 to 0.0117 0.0171 to 0.0214 0.0117 to 0.0146 0.0214 to 0.0257 0.0146 to 0.0175 0.0257 to 0.0300 0.0175 to 0.0205 0.0300 to 0.0343 ...
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... CPU REMOTE SENSING TRANSISTOR Remote Temperature Measurement The ADT7475 can measure the temperature of two remote diode sensors or diode-connected transistors connected to Pin 10 and Pin Pin 12 and Pin 13. The forward voltage of a diode or diode-connected transistor operated at a constant current exhibits a negative temperature coefficient of about – ...
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... ADT7475 The technique used in the ADT7475 is to measure the change in V when the device is operated at two different currents. BE This is given by ΔV = kT/q × ln(N) BE where Boltzmann’s constant the charge on the carrier the absolute temperature in Kelvin the ratio of the two currents. ...
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... ADT7475 180 μA and the low level current, HIGH μA. If the ADT7475 current levels do not match LOW the current levels specified by the CPU manufacturer, it might be necessary to remove an offset. The CPU’s data sheet advises whether this offset needs to be removed and how to calculate it ...
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... Reading Temperature from the ADT7475 It is important to note that temperature can be read from the ADT7475 as an 8-bit value (with 1°C resolution 10-bit value (with 0.25°C resolution). If only 1°C resolution is required, the temperature readings can be read back at any time and in no particular order ...
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... Single-Channel ADC Conversions Setting Bit 6 of Configuration Register 2 (0x73) places the ADT7475 into single-channel ADC conversion mode. In this mode, the ADT7475 can be made to read a single temperature channel only. The appropriate ADC channel is selected by writing to Bits [7:5] of the TACH1 minimum high byte register (0x55). ...
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... The analog monitoring cycle begins when written to the start bit (Bit 0) of Configuration Register 1 (0x40). By default, the ADT7475 powers up with this bit set. The ADC measures each analog input in turn and, as each measurement is completed, the result is automatically stored in the appropri- ate value register ...
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... The ADT7475 is a derivative of the ADT7467 result, the total conversion time in the ADT7475 is the same as the total conversion time of the ADT7467. Fan TACH measurements are made in parallel and are not synchronized with the analog measurements in any way ...
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... Configuration Register 3 (0x78) CLEARED ON READ (TEMP BELOW LIMIT) Assigning THERM Functionality to a Pin Pin 9 on the ADT7475 has four possible functions: SMBALERT , THERM , GPIO, and TACH4. The user chooses the required functionality by setting Bit 0 and Bit 1 of Configuration Register INTERRUPT MASK BIT 4 (0x7D) ...
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... The user can also set up the ADT7475 so that, when the THERM pin is driven low externally, the fans run at 100%. The fans run at 100% for the duration of the time that the THERM pin is pulled low. This is done by setting the BOOST bit (Bit 2) in Configuration Register 3 (0x78 ...
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... Figure 29. Functional Block Diagram of ADT7475’s THERM Monitoring Circuitry If the THERM timer value exceeds the THERM timer limit value, then the F4P bit (Bit 5) of Interrupt Status Register 2 is set, and an SMBALERT is generated. Note that the F4P bit (Bit ...
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... For example takes one week for 2.914 seconds to be exceeded and the next time it takes only one hour, this is an indication of a serious degradation in system performance. THERM as an input, the ADT7475 THERM low as an output. In cases where ...
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... TACH signal is an open-collector from the fan. In all cases, the TACH signal from the fan must be kept below 3.6 V maximum to prevent damaging the ADT7475 doubt as to whether the fan used has an open-collector or totem pole TACH output, use one of the input signal conditioning circuits shown in the Fan Speed Measurement section ...
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... PWM Figure 33. Driving a 4-Wire Fan Driving Two Fans from PWM3 The ADT7475 has four TACH inputs available for fan speed measurement but only three PWM drive outputs fourth fan is used in the system, it should be driven from the PWM3 output in parallel with the third fan. Figure 34 shows how to drive two fans in parallel using low cost NPN transistors ...
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... CC Measuring Fan TACH When the ADT7475 starts up, TACH measurements are locked. In effect, an internal read of the low byte has been made for each TACH input. The net result of this is that all TACH readings are locked until the high byte is read from the V corresponding TACH registers ...
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... Reading Fan Speed from the ADT7475 The measurement of fan speeds involves a 2-register read for each measurement. The low byte should be read first. This causes the high byte to be frozen until both high and low byte registers have been read, preventing erroneous TACH readings. ...
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... ADT7475 Fan Spin-Up The ADT7475 has a unique fan spin-up function. It spins the fan at 100% PWM duty cycle until two TACH pulses are detected on the TACH input. Once two TACH pulses have been detected, the PWM duty cycle goes to the expected running value, for example, 33% ...
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... XNOR TREE TEST MODE The ADT7475 includes an XNOR tree test mode. This mode is useful for in-circuit test equipment at board-level testing. By applying stimulus to the pins included in the XNOR tree possible to detect opens or shorts on the system board. ...
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... SMBus transactions before the fail- safe timeout (4.6 seconds) lapses, the ADT7475 drives the fans to full speed. If the ADT7475 is addressed by a valid SMBus transaction after this point, the fans stop, and the ADT7475 assumes its default settings and begins normal operation. ...
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... PWM outputs. The three PWM outputs can be used to control up to four fans. The ADT7475 allows the speed of four fans to be monitored. Each temperature channel has a thermal calibration block, allowing the designer to individually configure the thermal characteristics of each temperature channel ...
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... This influences the choice of whether to use the TACH4 pin or to reconfigure it for the THERM function the CPU fan to be controlled using the ADT7475 or will it run at full speed 100% of the time? If run at 100%, this frees up a PWM output, but the system is louder ...
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... ADT7475 Recommended Implementation 1 Configuring the ADT7475 as in Figure 45 provides the system designer with the following features: • Two PWM outputs for fan control three fans. (The front and rear chassis fans are connected in parallel.) • Three TACH fan speed measurement inputs. ...
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... ADT7475 Recommended Implementation 2 Configuring the ADT7475 as in Figure 46 provides the system designer with the following features: • Three PWM outputs for fan control three fans. (All three fans can be individually controlled.) • Three TACH fan speed measurement inputs. • V measured internally through Pin 3. ...
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... RANGE PWM MIN PWM CONFIG 100% PWM GENERATOR TACHOMETER 3 AND 4 0% MEASUREMENT T RANGE Figure 47. Assigning Temperature Channels to Fan Channels Rev Page ADT7475 RAMP CONTROL PWM1 (ACOUSTIC ENHANCEMENT) TACH1 CPU FAN SINK RAMP CONTROL PWM2 (ACOUSTIC ENHANCEMENT) TACH2 FRONT CHASSIS RAMP ...
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... ADT7475 Mux Configuration Example This is an example of how to configure the mux in a system using the ADT7475 to control three fans. The CPU fan sink is controlled by PWM1, the front chassis fan is controlled by PWM2, and the rear chassis fan is controlled by PWM3. The mux is configured for the following fan control behavior: • ...
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... T . MIN HYST − MIN HYST − MIN HYST − MIN HYST − MIN HYST RAMP CONTROL PWM1 (ACOUSTIC ENHANCEMENT) TACH1 CPU FAN SINK RAMP CONTROL PWM2 (ACOUSTIC ENHANCEMENT) TACH2 FRONT CHASSIS RAMP CONTROL PWM3 (ACOUSTIC ENHANCEMENT) TACH3 REAR CHASSIS ADT7475 ...
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... ADT7475 STEP 4: PWM FOR EACH PWM (FAN) OUTPUT MIN PWM is the minimum PWM duty cycle at which each fan in MIN the system runs also the start speed for each fan under automatic fan control once the temperature rises above T For maximum system acoustic benefit, PWM as low as possible ...
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... PWM duty cycle.) Determine the slope of the required control loop to meet these requirements. Using the ADT7475 evaluation software, graphically program and visualize this functionality. Ask your local Analog Devices, Inc. representative for details. is changed, the automatic fan control slope also ...
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... ADT7475 changed, the slope also changes RANGE gets smaller, the fans reach 100% speed with a smaller temperature change. 100% 10% 0% 30°C T MIN – HYST 40°C 45°C 54°C T MIN Figure 55. Increasing T Changes the AFC Slope RANGE 100% MAX PWM 10% ...
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... Figure 58. T This example uses the mux configuration described in Step 2: Configuring the Mux, with the ADT7475 connected as shown in Figure 48. Both CPU temperature and VRM temperature is affected drive the CPU fan connected to PWM1. Ambient temperature RANGE drives the front chassis fan and rear chassis fan connected to PWM2 and PWM3 ...
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... ADT7475 100 VRM TEMPERATURE CPU TEMPERATURE 60 50 AMBIENT TEMPERATURE TEMPERATURE ABOVE T 100 VRM TEMPERATURE CPU TEMPERATURE 60 AMBIENT TEMPERATURE TEMPERATURE ABOVE T Figure 59. T and % Fan Speed Slopes for VRM, Ambient, and ...
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... Temperature Rev Page RAMP CONTROL PWM1 (ACOUSTIC ENHANCEMENT) TACH1 CPU FAN SINK RAMP CONTROL PWM2 (ACOUSTIC ENHANCEMENT) TACH2 FRONT CHASSIS RAMP CONTROL PWM3 (ACOUSTIC ENHANCEMENT) TACH3 REAR CHASSIS . Bits [7:5] of Enhanced MIN . If the fans are always on, the T MIN . ADT7475 HYST ...
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... ADT7475 100 MIN THERMAL CALIBRATION T MIN THERMAL CALIBRATION REMOTE 2 = CPU TEMP T MIN LOCAL = THERMAL CALIBRATION VRM TEMP T MIN REMOTE 1 = AMBIENT TEMP Figure 61. The T Enhanced Acoustics Register 1 (0x62) Bit 7 (MIN3 PWM3 is off (0% PWM duty cycle) when temperature is below T − MIN HYST ...
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... ADT7475 Enhanced Acoustics Register 2 (0x63) Bits [2:0] (ACOU3), select the ramp rate for PWM outputs associated with the local temperature channel. 000 = 37.5 sec 001 = 18.8 sec 010 = 12.5 sec 011 = 7.5 sec 100 = 4.7 sec 101 = 3.1 sec 110 = 1.6 sec 111 = 0.8 sec Bits [6:4] (ACOU2), select the ramp rate for PWM outputs associated with the Remote 2 temperature input ...
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... ADT7475 REGISTER TABLES Table 15. ADT7475 Registers Address R/W Description Bit 7 0x10 R/W Configuration ExtraSlow Register 6 0x11 R Configuration RES Register 7 0x21 R V Reading 9 CCP 0x22 R V Reading 9 CC 0x25 R Remote 1 9 Temperature 0x26 R Local 9 Temperature 0x27 R Remote 2 9 Temperature 0x28 R TACH1 Low 7 Byte 0x29 ...
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... SPIN SPIN 0x62 SPIN SPIN SPIN 0x62 SPIN SPIN SPIN 0x62 FREQ FREQ FREQ 0xC4 FREQ FREQ FREQ 0xC4 FREQ FREQ FREQ 0xC4 ACOU1 ACOU1 ACOU1 0x00 ACOU3 ACOU3 ACOU3 0x00 ADT7475 Lockable Yes Yes Yes Yes Yes Yes Yes Yes ...
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... ADT7475 Address R/W Description Bit 7 0x64 R/W PWM1 Min 7 Duty Cycle 0x65 R/W PWM2 Min 7 Duty Cycle 0x66 R/W PWM3 Min 7 Duty Cycle 0x67 R/W Remote 1 7 Temp T MIN 0x68 R/W Local Temp 7 T MIN 0x69 R/W Remote 2 7 Temp T MIN 0x6A R/W Remote 1 7 THERM Temp Limit 0x6B ...
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... If the extended resolution bits of these readings are also read, the extended resolution registers (Reg. 0x76, Reg. 0x77) must be read first. Once the extended resolution registers are read, the associated MSB reading registers are frozen until read. Both the extended resolution registers and the MSB registers are frozen (Pin 3) is the supply voltage for the ADT7475. CC Bit 6 Bit 5 ...
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... Stalled or blocked (object jamming the fan). Failed (internal circuitry destroyed). Not populated. (The ADT7475 expects to see a fan connected to each TACH fan is not connected to that TACH, its TACH minimum high and low bytes should be set to 0xFFFF.) Alternate function, for example, TACH4 reconfigured as a THERM pin. ...
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... ADT7475 is powered down and powered up again. This prevents rogue programs such as viruses from modifying critical system limit settings. This bit is lockable. [2] RDY Read-only This bit is set the ADT7475 to indicate only that the device is fully powered up and ready to begin system monitoring. [3] FSPD R/W When set to 1, this bit runs all fans at max speed as programmed in the PWM current duty cycle registers (0x30 to 0x32) ...
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... ADT7475 Table 25. Register 0x42—Interrupt Status Register 2 (Power-On Default = 0x00) Bit Name R/W Description [1] OVT Read-only OVT = 1 indicates that one of the THERM overtemperature limits has been exceeded. This bit is cleared on a read of the status register when the temperature drops below THERM – T ...
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... ADT7475 Table 29. Register 0x55—TACH1 Minimum High Byte (Power-On Default = 0xFF) Bits Name R/W Description [4:0] Reserved Read-only These bits are reserved when Bit 6 of Configuration Register 2 (0x73) is set (single-channel ADC mode). Otherwise, these bits represent Bits [4:0] of the TACH1 minimum high byte register. ...
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... ADT7475 Table 32. Temp T /PWM Frequency Registers RANGE 1 Register Address R/W 0x5F R/W 0x60 R/W 0x61 R/W 1 These registers become read-only when the Configuration Register 1 lock bit is set. Any subsequent attempts to write to these registers fail. Table 33. Register 0x5F, Register 0x60, and Register 0x61—Temp T Bit Name ...
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... PWM 2 minimum duty cycle below T [7] MIN3 R/W When the ADT7475 is in automatic fan speed control mode, this bit defines whether PWM3 is off (0% duty cycle PWM3 minimum duty cycle when the controlling temperature is below its T value duty cycle below PWM3 minimum duty cycle below T 1 This register becomes read-only when the Configuration Register 1 lock bit is set to 1 ...
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... ADT7475 Table 35. Register 0x63—Enhanced Acoustics Register 2 (Power-On Default = 0x00) 1 Bit Name R/W Description [2:0] ACOU3 R/W Assuming that PWMx is associated with the local temperature channel, these bits define the maximum rate of change of the PWMx output for local temperature related changes. Instead of the fan speed jumping instantaneously to its newly determined speed, it ramps gracefully at the rate determined by these bits ...
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... Register Address R/W 0x64 R/W 0x65 R/W 0x66 R/W 1 These registers become read-only when the ADT7475 is in automatic fan control mode. Table 37. Register 0x64, Register 0x65, Register 0x66—PWM Minimum Duty Cycle Registers (Power-On Default = 0x80; 50% duty cycle) 1 Bit Name R/W [7:0] PWM duty cycle R/W 1 These registers become read-only when the ADT7475 is in automatic fan control mode. ...
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... ADT7475 Table 41. XNOR Tree Test Enable Register Register Address Bit Name 0x6F XEN [0] RES [7:1] 1 This register becomes read-only when the Configuration Register 1 lock bit is set to 1. Any subsequent attempts to write to this register fail. Table 42. Remote 1 Temperature Offset Register Register Address Bit ...
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... ATTN = 1, the ADT7475 removes the attenuators from the V can be used for other functions such as connecting up external sensors. CONV = 1, the ADT7475 is put into a single-channel ADC conversion mode. In this mode, the ADT7475 can be made to read continuously from one input only, for example, Remote 1 temperature. The appropriate ADC channel is selected by writing to Bits [7:5] of TACH1 minimum high byte register (0x55) ...
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... ADT7475 Table 48. Register 0x76—Extended Resolution Register 1 Bit Name R/W [3:2] V R/W CCP [5: this register is read, this register and the registers holding the MSB of each reading are frozen until read. Table 49. Register 0x77—Extended Resolution Register 2 Bit Name R/W [3:2] TDM1 R/W [5:4] LTMP R/W [7:6] TDM2 R this register is read, this register and the registers holding the MSB of each reading are frozen until read. ...
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... R/W Twos complement = 1, sets the temperature range to twos complement temperature range. COMPL Twos complement = 0, changes the temperature range to Offset 64. When this bit is changed, the ADT7475 interprets all relevant temperature register values as defined by this bit. [1] TempOffset R/W TempOffset = 0, sets offset range to −63°C to +64°C with 0.5°C resolution. ...
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... ADT7475 1 Bit Name R/W Description [6] Local R/W Local THERM = 0, THERM temperature limit functionality enabled for local temperature channel. THERM THERM can also be disabled on any channel by the following: In Offset 64 mode, writing −64°C to the appropriate THERM temperature limit. In twos complement mode, writing −128°C to the appropriate THERM temperature limit. ...
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... SEATING 0.010 BSC 0.008 PLANE 0.006 0.004 COMPLIANT TO JEDEC STANDARDS MO-137-AB Figure 62. 16-Lead Shrink Small Outline Package [QSOP] (RQ-16) Dimensions shown in inches Package Description 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP Evaluation Board Rev Page ADT7475 8° 0° 0.050 0.016 Package Option RQ-16 RQ-16 RQ-16 ...
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... ADT7475 NOTES Rev Page ...
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... NOTES Rev Page ADT7475 ...
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... ADT7475 NOTES ©2005–2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05381-0-11/07(B) Rev Page ...